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MF1S5009DA4 数据表(PDF) 31 Page - NXP Semiconductors |
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MF1S5009DA4 数据表(HTML) 31 Page - NXP Semiconductors |
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31 / 32 page ![]() MF1S5009 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet PUBLIC Rev. 3 — 27 July 2010 189131 31 of 32 NXP Semiconductors MF1S5009 Mainstream contactless smart card IC 20. Tables Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .3 Table 2. Bonding pad assignments to smart card contactless module . . . . . . . . . . . . . . . . . . . . . . .4 Table 3. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Table 4. Memory operations . . . . . . . . . . . . . . . . . . . . . .12 Table 5. Access conditions . . . . . . . . . . . . . . . . . . . . . . .13 Table 6. Access conditions for the sector trailer . . . . . .14 Table 7. Access conditions for data blocks. . . . . . . . . . .15 Table 8. Command overview . . . . . . . . . . . . . . . . . . . . .16 Table 9. MIFARE ACK and NAK . . . . . . . . . . . . . . . . . .17 Table 10. ATQA response of the MF1S5009 . . . . . . . . . .18 Table 11. SAK response of the MF1S5009 . . . . . . . . . . .18 Table 12. MIFARE authentication command . . . . . . . . . .20 Table 13. MIFARE authentication timing . . . . . . . . . . . . .20 Table 14. MIFARE Read command . . . . . . . . . . . . . . . . . 21 Table 15. MIFARE Read timing . . . . . . . . . . . . . . . . . . . . 21 Table 16. MIFARE Write command . . . . . . . . . . . . . . . . . 22 Table 17. MIFARE Write timing . . . . . . . . . . . . . . . . . . . . 22 Table 18. MIFARE Increment, Decrement and Restore command . . . . . . . . . . . . . . . . . . . . . . 23 Table 19. MIFARE Increment, Decrement and Restore timing . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 20. MIFARE Transfer command. . . . . . . . . . . . . . . 25 Table 21. MIFARE Transfer timing. . . . . . . . . . . . . . . . . . 25 Table 22. Limiting values [1][2] . . . . . . . . . . . . . . . . . . . . . 25 Table 23. Characteristics [1][2] . . . . . . . . . . . . . . . . . . . . . 25 Table 24. Abbreviations and symbols . . . . . . . . . . . . . . . 27 Table 25. Revision history . . . . . . . . . . . . . . . . . . . . . . . . 28 21. Figures Fig 1. MIFARE card reader . . . . . . . . . . . . . . . . . . . . . . .1 Fig 2. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Fig 3. Contact assignments for SOT500-2 (MOA4) . . . .4 Fig 4. Chip orientation and bond pad locations . . . . . . . .6 Fig 5. Three pass authentication . . . . . . . . . . . . . . . . . . .8 Fig 6. Memory organization . . . . . . . . . . . . . . . . . . . . . .10 Fig 7. Manufacturer block . . . . . . . . . . . . . . . . . . . . . . . 11 Fig 8. Value blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Fig 9. Sector trailer . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Fig 10. Access conditions . . . . . . . . . . . . . . . . . . . . . . . .13 Fig 11. Frame Delay Time (from PCD to PICC), and TACK and TNAK. . . . . . . . . . . . . . . . . . . . . . . .17 Fig 12. MIFARE Authentication part 1 . . . . . . . . . . . . . . .19 Fig 13. MIFARE Authentication part 2 . . . . . . . . . . . . . . .19 Fig 14. MIFARE Read . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Fig 15. MIFARE Write part 1 . . . . . . . . . . . . . . . . . . . . . .21 Fig 16. MIFARE Write part 2 . . . . . . . . . . . . . . . . . . . . . .22 Fig 17. MIFARE Increment, Decrement and Restore part 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Fig 18. MIFARE Increment, Decrement and Restore part 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Fig 19. MIFARE Transfer . . . . . . . . . . . . . . . . . . . . . . . . .24 Fig 20. Package outline SOT500-2 . . . . . . . . . . . . . . . . .26 |
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