MF1S5009

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Product data sheet

PUBLIC

Rev. 3 — 27 July 2010

189131

5 of 32

NXP Semiconductors

MF1S5009

Mainstream contactless smart card IC

[1]

The gap between chips may vary due to changing foil expansion.

[2]

Pads P1, TP2 and VSS are disconnected when wafer is sawn.

7.1 Fail die identification

Electronic wafer mapping covers the electrical test results and additionally the results of

mechanical/visual inspection.

No ink dots are applied.

gap between chips[1]

typical = 15

μm

minimum = 5

μm

Passivation

type

sandwich structure

material

nitride

thickness

1.75

μm

Au bump (substrate connected to VSS)

material

hardness

35 to 80 HV 0.005

shear strength

>70 MPa

height

18

μm

height uniformity

within a die =

±2 μm

within a wafer =

±3 μm

wafer to wafer =

±4 μm

flatness

minimum =

±1.5 μm

size

LA, LB = 69

μm × 69 μm

P1;TP2;VSS[2] =58 μm × 58 μm

size variation

±5 μm

under bump metallization

sputtered TiW

Table 3.

Specifications