PIC18F23K22-ESLASHML datasheet(21/496 Pages) MICROCHIP

21 / 496 page

 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 21

PIC18(L)F2X/4XK22

VDD

—

Positive supply for logic and I/O pins.

8, 19

5, 16

VSS

—

Ground reference for logic and I/O pins.

TABLE 1-2:

PIC18(L)F2XK22 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Number

Pin Name

Type

Buffer

Type

Description

PDIP,

SOIC

QFN,

UQFN

Legend:

TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;

I = Input; O = Output; P = Power.

Note 1:

Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are set.

Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and

CCP2MX are clear.

TABLE 1-3:

PIC18(L)F4XK22 PINOUT I/O DESCRIPTIONS

Pin Number

Pin Name

Type

Buffer

Type

Description

PDIP

TQFP

QFN

UQFN

219

RA0/C12IN0-/AN0

RA0

I/O

TTL

Digital I/O.

C12IN0-

Analog Comparators C1 and C2 inverting input.

AN0

Analog Analog input 0.

320

RA1/C12IN1-/AN1

RA1

I/O

TTL

Digital I/O.

C12IN1-

Analog Comparators C1 and C2 inverting input.

AN1

Analog Analog input 1.

421

RA2/C2IN+/AN2/DACOUT/VREF-

RA2

I/O

TTL

Digital I/O.

C2IN+

Analog Comparator C2 non-inverting input.

AN2

Analog Analog input 2.

DACOUT

Analog DAC Reference output.

VREF-

Analog A/D reference voltage (low) input.

522

RA3/C1IN+/AN3/VREF+

RA3

I/O

TTL

Digital I/O.

C1IN+

Analog Comparator C1 non-inverting input.

AN3

Analog Analog input 3.

VREF+

Analog A/D reference voltage (high) input.

623

RA4/C1OUT/SRQ/T0CKI

RA4

I/O

TTL

Digital I/O.

C1OUT

CMOS Comparator C1 output.

SRQ

TTL

SR Latch Q output.

T0CKI

Timer0 external clock input.

Legend:

TTL = TTL compatible input CMOS = CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels;

I = Input; O = Output; P = Power.

Note

1: Default pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX, CCP3MX

and CCP2MX are set.

2: Alternate pin assignment for P2B, T3CKI, CCP3/P3A and CCP2/P2A when Configuration bits PB2MX, T3CMX,

CCP3MX and CCP2MX are clear.

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