PIC18F23K22-ESLASHML datasheet(91/496 Pages) MICROCHIP

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Preliminary

DS41412C-page 91

PIC18(L)F2X/4XK22

5.4.3.1

FSR Registers and the INDF

Operand

At the core of indirect addressing are three sets of reg-

isters: FSR0, FSR1 and FSR2. Each represents a pair

of 8-bit registers, FSRnH and FSRnL. Each FSR pair

holds a 12-bit value, therefore, the four upper bits of the

FSRnH register are not used. The 12-bit FSR value can

address the entire range of the data memory in a linear

fashion. The FSR register pairs, then, serve as pointers

to data memory locations.

Indirect addressing is accomplished with a set of

Indirect File Operands, INDF0 through INDF2. These

can be thought of as “virtual” registers: they are

mapped in the SFR space but are not physically

implemented. Reading or writing to a particular INDF

the data at the address indicated by FSR1H:FSR1L.

Instructions that use the INDF registers as operands

actually use the contents of their corresponding FSR as

a pointer to the instruction’s target. The INDF operand

is just a convenient way of using the pointer.

Because indirect addressing uses a full 12-bit address,

data RAM banking is not necessary. Thus, the current

contents of the BSR and the Access RAM bit have no

effect on determining the target address.

5.4.3.2

FSR Registers and POSTINC,

POSTDEC, PREINC and PLUSW

In addition to the INDF operand, each FSR register pair

also has four additional indirect operands. Like INDF,

these are “virtual” registers which cannot be directly

read or written. Accessing these registers actually

accesses the location to which the associated FSR

on the FSR value. They are:

• POSTDEC: accesses the location to which the

FSR points, then automatically decrements the

FSR by 1 afterwards

• POSTINC: accesses the location to which the

FSR points, then automatically increments the

FSR by 1 afterwards

• PREINC: automatically increments the FSR by 1,

then uses the location to which the FSR points in

the operation

• PLUSW: adds the signed value of the W register

(range of -127 to 128) to that of the FSR and uses

the location to which the result points in the

operation.

In this context, accessing an INDF register uses the

value in the associated FSR register without changing

it. Similarly, accessing a PLUSW register gives the

FSR value an offset by that in the W register; however,

neither W nor the FSR is actually changed in the

operation. Accessing the other virtual registers

changes the value of the FSR register.

FIGURE 5-10:

INDIRECT ADDRESSING

FSR1H:FSR1L

Data Memory

000h

100h

200h

300h

F00h

E00h

FFFh

Bank 0

Bank 1

Bank 2

Bank 14

Bank 15

Bank 3

through

Bank 13

ADDWF, INDF1, 1

Using an instruction with one of the

indirect addressing registers as the

operand....

...uses the 12-bit address stored in

the FSR pair associated with that

...to determine the data memory

location to be used in that operation.

In this case, the FSR1 pair contains

ECCh. This means the contents of

location ECCh will be added to that

of the W register and stored back in

ECCh.

xx xx 11 10

1 1 0 0 110 0

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