PIC18F23K22-ESLASHML datasheet(71/496 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 71

PIC18(L)F2X/4XK22

A CALL type instruction causes a push onto the stack;

the Stack Pointer is first incremented and the location

pointed to by the Stack Pointer is written with the

contents of the PC (already pointing to the instruction

following the CALL). A RETURN type instruction causes

a pop from the stack; the contents of the location

pointed to by the STKPTR are transferred to the PC

and then the Stack Pointer is decremented.

The Stack Pointer is initialized to ‘00000’ after all

Resets. There is no RAM associated with the location

corresponding to a Stack Pointer value of ‘00000’; this

is only a Reset value. Status bits indicate if the stack is

full or has overflowed or has underflowed.

5.1.2.1

Top-of-Stack Access

Only the top of the return address stack (TOS) is readable

and writable. A set of three registers, TOSU:TOSH:TOSL,

hold the contents of the stack location pointed to by the

STKPTR register (Figure 5-2). This allows users to

implement a software stack if necessary. After a CALL,

RCALL or interrupt, the software can read the pushed

value by reading the TOSU:TOSH:TOSL registers. These

values can be placed on a user defined software stack. At

return time, the software can return these values to

TOSU:TOSH:TOSL and do a return.

The user must disable the Global Interrupt Enable (GIE)

bits while accessing the stack to prevent inadvertent

stack corruption.

FIGURE 5-2:

RETURN ADDRESS STACK AND ASSOCIATED REGISTERS

5.1.2.2

Return Stack Pointer (STKPTR)

The STKPTR register (Register 5-1) contains the Stack

Pointer value, the STKFUL (stack full) Status bit and

the STKUNF (Stack Underflow) Status bits. The value

of the Stack Pointer can be 0 through 31. The Stack

Pointer increments before values are pushed onto the

stack and decrements after values are popped off the

stack. On Reset, the Stack Pointer value will be zero.

The user may read and write the Stack Pointer value.

This feature can be used by a Real-Time Operating

System (RTOS) for return stack maintenance.

After the PC is pushed onto the stack 31 times (without

popping any values off the stack), the STKFUL bit is

set. The STKFUL bit is cleared by software or by a

POR.

The action that takes place when the stack becomes

full depends on the state of the STVREN (Stack Over-

flow Reset Enable) Configuration bit. (Refer to

Section 24.1 “Configuration Bits” for a description of

the device Configuration bits.) If STVREN is set

(default), the 31st push will push the (PC + 2) value

onto the stack, set the STKFUL bit and reset the

device. The STKFUL bit will remain set and the Stack

Pointer will be set to zero.

If STVREN is cleared, the STKFUL bit will be set on the

31st push and the Stack Pointer will increment to 31.

Any additional pushes will not overwrite the 31st push

and STKPTR will remain at 31.

When the stack has been popped enough times to

unload the stack, the next pop will return a value of zero

to the PC and sets the STKUNF bit, while the Stack

Pointer remains at zero. The STKUNF bit will remain

set until cleared by software or until a POR occurs.

00011

001A34h

11111

11110

11101

00010

00001

00000

00010

Return Address Stack <20:0>

Top-of-Stack

000D58h

TOSL

TOSH

TOSU

34h

1Ah

00h

STKPTR<4:0>

Top-of-Stack Registers

Stack Pointer

Note:

Returning a value of zero to the PC on an

underflow has the effect of vectoring the

program to the Reset vector, where the

stack conditions can be verified and

appropriate actions can be taken. This is

not the same as a Reset, as the contents

of the SFRs are not affected.

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