LIS331DLF datasheet(28/38 Pages) STMICROELECTRONICS

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LIS331DLF

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Doc ID 15101 Rev 4

7.4

CTRL_REG3 [Interrupt CTRL register] (22h)

7.5

CTRL_REG4 (23h)

Table 25.

CTRL_REG3 register

IHL

PP_OD

LIR2

I2_CFG1

I2_CFG0

LIR1

I1_CFG1

I1_CFG0

Table 26.

CTRL_REG3 description

IHL

Interrupt active high, low. Default value: 0

(0: active high; 1: active low)

PP_OD

Push-pull/Open drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)

LIR2

Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by

reading INT2_SRC itself. Default value: 0.

(0: interrupt request not latched; 1: interrupt request latched)

I2_CFG1,

I2_CFG0

Data signal on INT 2 pad control bits. Default value: 00.

(see table below)

LIR1

Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by

reading INT1_SRC register. Default value: 0.

(0: interrupt request not latched; 1: interrupt request latched)

I1_CFG1,

I1_CFG0

Data signal on INT 1 pad control bits. Default value: 00.

(see table below)

Table 27.

Data signal on INT 1 and INT 2 pad

I1(2)_CFG1

I1(2)_CFG0

INT 1(2) Pad

Interrupt 1 (2) source

Interrupt 1 source OR Interrupt 2 source

Data ready

Boot running

Table 28.

CTRL_REG4 register

FS1

FS0

STsign

SIM

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