LIS331DLF datasheet(34/38 Pages) STMICROELECTRONICS

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LIS331DLF

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Doc ID 15101 Rev 4

7.18

INT2_SRC (35h)

Interrupt 2 source register. Read only register.

Reading at this address clears INT2_SRC IA bit (and the interrupt signal on INT 2 pin) and

allows the refreshment of data in the INT2_SRC register if the latched option was chosen.

7.19

INT2_THS (36h)

AND combination of interrupt events

6 direction position recognition

Table 47.

Interrupt mode configuration (continued)

AOI

Interrupt mode

Table 48.

INT2_SRC register

YHYLXHXL

Table 49.

INT2_SRC description

Interrupt active. Default value: 0

(0: no interrupt has been generated; 1: one or more interrupts have been generated)

Z high. Default value: 0

(0: no interrupt, 1: Z high event has occurred)

Z low. Default value: 0

(0: no interrupt; 1: Z low event has occurred)

Y high. Default value: 0

(0: no interrupt, 1: Y high event has occurred)

Y low. Default value: 0

(0: no interrupt, 1: Y low event has occurred)

X high. Default value: 0

(0: no interrupt, 1: X high event has occurred)

X low. Default value: 0

(0: no interrupt, 1: X low event has occurred)

Table 50.

INT2_THS register

THS6

THS5

THS4

THS3

THS2

THS1

THS0

Table 51.

INT2_THS description

THS6 - THS0

Interrupt 1 threshold. Default value: 000 0000

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