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325 数据表(PDF) 48 Page - Intel Corporation |
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325 数据表(HTML) 48 Page - Intel Corporation |
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48 / 82 page ![]() Pin Listing and Signal Descriptions 48 Datasheet Table 4-2. Numerical Pin Assignment Pin # Pin Name Signal Buffer Type Direction A2 THERMTRIP# Asynch GTL+ Output A3 VSS Power/Other A4 VSS_SENSE Power/Other Output A5 VCC_SENSE Power/Other Output A6 TESTHI11 Power/Other Input A7 RESERVED A8 VCC Power/Other A9 VSS Power/Other A10 VCC Power/Other A11 VSS Power/Other A12 VCC Power/Other A13 VSS Power/Other A14 VCC Power/Other A15 VSS Power/Other A16 VCC Power/Other A17 VSS Power/Other A18 VCC Power/Other A19 VSS Power/Other A20 VCC Power/Other A21 VSS Power/Other A22 RESERVED A23 D2# Source Synch Input/Output A24 VSS Power/Other A25 D3# Source Synch Input/Output A26 VSS Power/Other B2 IGNNE# Asynch GTL+ Input B3 THERMDA Power/Other B4 VSS Power/Other B5 SMI# Asynch GTL+ Input B6 FERR#/PBE# Asynch AGL+ Output B7 VCC Power/Other B8 VSS Power/Other B9 VCC Power/Other B10 VSS Power/Other B11 VCC Power/Other B12 VSS Power/Other B13 VCC Power/Other B14 VSS Power/Other B15 VCC Power/Other B16 VSS Power/Other B17 VCC Power/Other B18 VSS Power/Other B19 VCC Power/Other B20 VSS Power/Other B21 D0# Source Synch Input/Output B22 D1# Source Synch Input/Output B23 VSS Power/Other B24 D6# Source Synch Input/Output B25 D9# Source Synch Input/Output B26 VSS Power/Other C1 TDI TAP Input C2 VSS Power/Other C3 PROCHOT# Asynch GTL+ Input/Output C4 THERMDC Power/Other C5 VSS Power/Other C6 A20M# Asynch GTL+ Input C7 VSS Power/Other C8 VCC Power/Other C9 VSS Power/Other C10 VCC Power/Other C11 VSS Power/Other C12 VCC Power/Other C13 VSS Power/Other C14 VCC Power/Other C15 VSS Power/Other C16 VCC Power/Other C17 VSS Power/Other C18 VCC Power/Other C19 VSS Power/Other C20 VCC Power/Other C21 D4# Source Synch Input/Output C22 VSS Power/Other C23 D7# Source Synch Input/Output C24 D8# Source Synch Input/Output C25 VSS Power/Other C26 D12# Source Synch Input/Output D1 LINT0 Asynch GTL+ Input D2 BPRI# Common Clock Input D3 VSS Power/Other D4 TCK TAP Input D5 TDO TAP Output D6 VSS Power/Other Table 4-2. Numerical Pin Assignment Pin # Pin Name Signal Buffer Type Direction |
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