| 数据搜索系统,热门电子元器件搜索 |
|
M48T08 数据表(PDF) 13 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M48T08 数据表(HTML) 13 Page - STMicroelectronics |
|
13 / 31 page ![]() M48T08, M48T08Y, M48T18 Operation modes Doc ID 2411 Rev 10 13/31 2.3 Data retention mode With valid VCC applied, the M48T08/18/08Y operates as a conventional BYTEWIDE™ static RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write protecting itself when VCC falls within the VPFD (max), VPFD (min) window. All outputs become high impedance, and all inputs are treated as “Don't care.” Note: A power failure during a WRITE cycle may corrupt data at the currently addressed location, but does not jeopardize the rest of the RAM's content. At voltages below VPFD (min), the user can be assured the memory will be in a write protected state, provided the VCC fall time is not less than tF. The M48T08/18/08Y may respond to transient noise spikes on VCC that reach into the deselect window during the time the device is sampling VCC. Therefore, decoupling of the power supply lines is recommended. When VCC drops below VSO, the control circuit switches power to the internal battery which preserves data and powers the clock. The internal button cell will maintain data in the M48T08/18/08Y for an accumulated period of at least 10 years when VCC is less than VSO. Note: Requires use of M4T32-BR12SH SNAPHAT® top when using the SOH28 package. As system power returns and VCC rises above VSO, the battery is disconnected and the power supply is switched to external VCC. Write protection continues until VCC reaches VPFD (min) plus trec (min). E1 should be kept high or E2 low as VCC rises past VPFD (min) to prevent inadvertent WRITE cycles prior to system stabilization. Normal RAM operation can resume trec after VCC exceeds VPFD (max). For more information on battery storage life refer to the application note AN1012. 2.4 Power-fail interrupt pin The M48T08/18/08Y continuously monitors VCC. When VCC falls to the power-fail detect trip point, an interrupt is immediately generated. An internal clock provides a delay of between 10 µs and 40 µs before automatically deselecting the M48T08/18/08Y. The INT pin is an open drain output and requires an external pull-up resistor, even if the interrupt output function is not being used. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |