STM32F103CBU6TR datasheet(38/96 Pages) STMICROELECTRONICS

部件名	STM32F103CBU6TR

功能描述	Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces

PDF	96 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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38 / 96 page

Electrical characteristics

STM32F103x8, STM32F103xB

38/96

Doc ID 13587 Rev 12

Table 11.

Embedded reset and power control block characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VPVD

Programmable voltage

detector level selection

PLS[2:0]=000 (rising edge)

2.1

2.18

2.26

PLS[2:0]=000 (falling edge)

2.08

2.16

PLS[2:0]=001 (rising edge)

2.19

2.28

2.37

PLS[2:0]=001 (falling edge)

2.09

2.18

2.27

PLS[2:0]=010 (rising edge)

2.28

2.38

2.48

PLS[2:0]=010 (falling edge)

2.18

2.28

2.38

PLS[2:0]=011 (rising edge)

2.38

2.48

2.58

PLS[2:0]=011 (falling edge)

2.28

2.38

2.48

PLS[2:0]=100 (rising edge)

2.47

2.58

2.69

PLS[2:0]=100 (falling edge)

2.37

2.48

2.59

PLS[2:0]=101 (rising edge)

2.57

2.68

2.79

PLS[2:0]=101 (falling edge)

2.47

2.58

2.69

PLS[2:0]=110 (rising edge)

2.66

2.78

2.9

PLS[2:0]=110 (falling edge)

2.56

2.68

2.8

PLS[2:0]=111 (rising edge)

2.76

2.88

PLS[2:0]=111 (falling edge)

2.66

2.78

2.9

VPVDhyst

(2)

PVD hysteresis

100

VPOR/PDR

Power on/power down

reset threshold

Falling edge

1.8(1)

The product behavior is guaranteed by design down to the minimum VPOR/PDR value.

1.88

1.96

Rising edge

1.84

1.92

2.0

VPDRhyst

(2)

PDR hysteresis

TRSTTEMPO

(2)

Guaranteed by design, not tested in production.

Reset temporization

2.5

4.5

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