MPC8572ECLPXARLD datasheet(19/140 Pages) FREESCALE

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

DDR2 and DDR3 SDRAM Controller

This section describes the DC and AC electrical specifications for the DDR2 and DDR3 SDRAM

controller interface of the MPC8572E. Note that the required GVDD(typ) voltage is 1.8Vor 1.5V when

interfacing to DDR2 or DDR3 SDRAM respectively.

6.1

DDR2 and DDR3 SDRAM Interface DC Electrical Characteristics

Table 10 provides the recommended operating conditions for the DDR SDRAM Controller of the

MPC8572E when interfacing to DDR2 SDRAM.

Table 11 provides the recommended operating conditions for the DDR SDRAM Controller of the

MPC8572E when interfacing to DDR3 SDRAM.

Table 10. DDR2 SDRAM Interface DC Electrical Characteristics for GVDD(typ) = 1.8 V

Parameter/Condition

Symbol

Min

Max

Unit

Notes

I/O supply voltage

GVDD

1.71

1.89

I/O reference voltage

MVREFn

0.49

× GVDD

0.51

× GVDD

I/O termination voltage

VTT

MVREFn –0.04

MVREFn + 0.04

Input high voltage

VIH

MVREFn + 0.125

GVDD +0.3

—

Input low voltage

VIL

–0.3

MVREFn – 0.125

—

Output leakage current

IOZ

–50

μA4

Output high current (VOUT = 1.420 V)

IOH

–13.4

—

Output low current (VOUT = 0.280 V)

IOL

13.4

—

Notes:

1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.

2. MVREFn is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver.

Peak-to-peak noise on MVREFn may not exceed ±2% of the DC value.

3. VTT is not applied directly to the device. It is the supply to that far end signal termination is made and is expected to be

equal to MVREFn. This rail should track variations in the DC level of MVREFn.

4. Output leakage is measured with all outputs disabled, 0 V

≤ VOUT ≤ GVDD.

Table 11. DDR3 SDRAM Interface DC Electrical Characteristics for GVDD(typ) = 1.5 V

Parameter/Condition

Symbol

Min

Typical

Max

Unit

I/O supply voltage

GVDD

1.425

1.575

I/O reference voltage

MVREFn

0.49

× GVDD

0.51

× GVDD

Input high voltage

VIH

MVREFn + 0.100

GVDD

V—

Input low voltage

VIL

GND

MVREFn – 0.100

—

MPC8572ECLPXARLD 数据表(PDF) 19 Page - Freescale Semiconductor, Inc

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