Data Sheet TLE 6232 GP

V2.3

Page

2009-11-18

13

Serial/Parallel Control of the Power Stages 1...6

(SPI-Instructions: WR_MUX, RD_MUX, WR_SCON, RD_SCON)

The following table shows the truth table for the control of the power stages 1...6. The register

MUX_REG prescribes parallel or serial control of the power stages. The register SCON_REG

prescribes the state of the power stage in case of serial control.

RST

PRG

INx

MUXx

SCONx

Output OUTx of Power Stage x, x = 1..6

0

X

X

X

X

OUTx off

1

X

X

0

0

Serial Control: OUTx on

1

X

X

0

1

Serial Control: OUTx off

1

0

0

1

X

Parallel Control: OUTx on

1

0

1

1

X

Parallel Control: OUTx off

1

1

0

1

X

Parallel Control: OUTx off

1

1

1

1

X

Parallel Control: OUTx on

Note: Serial Data bits are low active. Parallel Inputs are high or low active depending on the PRG pin.

Description of the SPI Registers

Register:

MUX_REG

7

6

5

4

3

2

1

0

MUX6

MUX5

MUX4

MUX3

MUX2

MUX1

1

1

State of

Reset:

FFH

Access by

Controller:

Read/Write

Bit

Name

Description

7

MUX6

Serial or parallel control of power stage 6

6

MUX5

Serial or parallel control of power stage 5

5

MUX4

Serial or parallel control of power stage 4

4

MUX3

Serial or parallel control of power stage 3

3

MUX2

Serial or parallel control of power stage 2

2

MUX1

Serial or parallel control of power stage 1

1-0

No function: HIGH on reading

Register:

SCON_REG

7

6

5

4

3

2

1

0

SCON6

SCON5

SCON4

SCON3

SCON2

SCON1

1

1

State of

Reset:

FFH

Access by

Controller:

Read/Write

Bit

Name

Description

7

SCON6

State of serial control of power stage 6

6

SCON5

State of serial control of power stage 5

5

SCON4

State of serial control of power stage 4

4

SCON3

State of serial control of power stage 3

3

SCON2

State of serial control of power stage 2

2

SCON1

State of serial control of power stage 1

1-0

No function: HIGH on reading

Diagnostics/Encoding of Failures