STM8L15 datasheet(121/122 Pages) STMICROELECTRONICS

121 / 122 page

STM8L151xx, STM8L152xx

Revision history

Doc ID 15962 Rev 5

121/122

23-Jul-2010

Modified Introduction and Description

Modified Table 4: Legend/abbreviation for table 5 on page 27 and

Table 5: STM8L15x pin description on page 27 (for PA0, PA1, PB0 and

PB4 and for reset states in the floating input column)

Modified Figure 1: STM8L15xxx device block diagram on page 13 and

Figure 2: STM8L15x clock tree diagram on page 18

Modified Figure 3.1: Low power modes on page 14 and Figure 3.5: Low

power real-time clock on page 18

Modified CLK_PCKENR2 and CLK_HSICALR reset values in Table 8:

General hardware register map on page 37

Modified notes below Figure 9: Memory map on page 35

Modified PA_CR1 reset value in Table7 on page36

Modified reset values for Px_IDR registers in Table 7 on page 36

Modified Table 14: Voltage characteristics on page 61, Table 15:

Current characteristics on page 62

Modified VIH in Table 36: I/O static characteristics on page 85

Modified Table 20: Total current consumption in Wait mode on page 69

Modified Figure 37: Typical application with I2C bus and timing diagram

1) on page 96

Modified IL value in Figure 39: Typical connection diagram using the

ADC on page 105

Modified RH and RL in Table 43: LCD characteristics on page 97

Added graphs in Section 9: Electrical parameters on page 60

Modified note 3 below Table 44: Reference voltage characteristics on

page 98

Added notes to

Modified note 1 below Table 45: TS characteristics on page 99

Changed VESD(CDM) value in Table 57 on page 108

Modified notes or added notes below UFQFPN32 and UFQFPN48

packages

Table 66.

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STM8L15 数据表(PDF) 121 Page - STMicroelectronics

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