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STM8L15 数据表(PDF) 49 Page - STMicroelectronics |
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STM8L15 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 122 page  STM8L151xx, STM8L152xx Memory and register map Doc ID 15962 Rev 5 49/122 0x00 534E ADC1 ADC1_TRIGR1 ADC1 trigger disable 1 0x00 0x00 534F ADC1_TRIGR2 ADC1 trigger disable 2 0x00 0x00 5350 ADC1_TRIGR3 ADC1 trigger disable 3 0x00 0x00 5351 ADC1_TRIGR4 ADC1 trigger disable 4 0x00 0x00 5352 to 0x00 537F Reserved area (46 bytes) 0x00 5380 DAC DAC_CR1 DAC control register 1 0x00 0x00 5381 DAC_CR2 DAC control register 2 0x00 0x00 5382 to 0x00 5383 Reserved area (2 bytes) 0x00 5384 DAC_SWTRIGR DAC software trigger register 0x00 0x00 5385 DAC_SR DAC status register 0x00 0x00 5386 to 0x00 5387 Reserved area (2 bytes) 0x00 5388 DAC_RDHRH DAC right aligned data holding register high 0x00 0x00 5389 DAC_RDHRL DAC right aligned data holding register low 0x00 0x00 538A to 0x00 538B Reserved area (2 bytes) 0x00 538C DAC_LDHRH DAC left aligned data holding register high 0x00 0x00 538D DAC_LDHRL DAC left aligned data holding register low 0x00 0x00 538E to 0x00 538F Reserved area (2 bytes) 0x00 5390 DAC_DHR8 DAC 8-bit data holding register 0x00 0x00 5391 to 0x00 53AB Reserved area (27 bytes) 0x00 53AC DAC_DORH DAC data output register high 0x00 0x00 53AD DAC_DORL DAC data output register low 0x00 0x00 53AE to 0x00 53FF Reserved area (82 bytes) Table 8. General hardware register map (continued) Address Block Register label Register name Reset status |
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