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MIC3003GML 数据表(PDF) 61 Page - Micrel Semiconductor

部件名 MIC3003GML
功能描述  FOM Management IC with Internal Calibration
PDF  75 Pages
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制造商  MICREL [Micrel Semiconductor]
网页  http://www.micrel.com
标志 MICREL - Micrel Semiconductor

MIC3003GML 数据表(HTML) 61 Page - Micrel Semiconductor

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Micrel, Inc.
MIC3003
November 2009
61
M9999-111209-C
hbwhelp@micrel.com or (408) 955-1690
Fault Suppression Timer (FLTTMR)
Fault Suppression Interval in Increments of 0.5 ms
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default value
0000 0000b = 00h
Serial address
A6h
Byte address
10 = 0Ah
Saturation faults are suppressed for a time, tFLTTMR, following laser turn-on. This avoids nuisance tripping while the APC loop
starts up. The length of this interval is (FLTTMR x 0.5 ms), typical. A value of zero will result in no fault suppression.
A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power
and reset cycles.
Fault Mask (FLTMSK)
D[7]
OEMIM
read/write
D[6]
POHE
read/write
D[5]
reserved
D[4]
reserved
D[3]
SATMSK
read/write
D[2]
TXMSK
read/write
D[1]
IAMSK
read/write
D[0]
DFMSK
read/write
Default value
0000 0000b = 00h
Serial address
A6h
Byte address
11 = 0Bh
A valid OEM password is required for access to this register. This register is non-volatile and will be maintained through power
and reset cycles.
Bit
Function
Operation
D[7]
OEMIM
OEM interrupt mask
1 = Interrupts are masked
0 = Interrupts are enabled
This bit is similar to the IE (Global Interrupt Enable) bit in the
User Control Register. The /INT output can only be asserted
if IE is high and OEMIM is low.
D[6]
POHE
OEM Power-on Hour Meter enable
1 = Power-on Hour Meter enabled
0 = Power-on Hour Meter disabled
D[5:4]
D[5:4]
Reserved
Always write as zero; reads undefined
D[3]
SATMSK
APC saturation fault mask
1 = masked; 0 = enabled
D[2]
TXMSK
High TX optical power fault mask
1 = masked; 0 = enabled
D[1]
IAMSK
High bias current high fault mask
1 = masked; 0 = enabled
D[0]
DFMSK
Diode fault mask
1 = masked; 0 = enabled



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