R5F364AMNFB datasheet(16/92 Pages) RENESAS

部件名	R5F364AMNFB

功能描述	This MCU consumes low power, and supports operating modes

PDF	92 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

16 / 92 page

R01DS0032EJ0200 Rev.2.00

Page 16 of 88

Feb 07, 2011

M16C/64A Group

2. Central Processing Unit (CPU)

2.8.7

Interrupt Enable Flag (I Flag)

The I flag enables maskable interrupts.

Maskable interrupts are disabled when the I flag is 0, and enabled when it is 1. The I flag becomes 0

when an interrupt request is accepted.

2.8.8

Stack Pointer Select Flag (U Flag)

ISP is selected when the U flag is 0. USP is selected when the U flag is 1.

The U flag becomes 0 when a hardware interrupt request is accepted, or the INT instruction of software

interrupt number 0 to 31 is executed.

2.8.9

Processor Interrupt Priority Level (IPL)

IPL is 3 bits wide and assigns processor interrupt priority levels from 0 to 7.

If a requested interrupt has higher priority than IPL, the interrupt request is enabled.

2.8.10

Reserved Areas

Only set these bits to 0. The read value is undefined.

R5F364AMNFB 数据表(PDF) 16 Page - Renesas Technology Corp