STTS2002B2DN3F datasheet(37/52 Pages) STMICROELECTRONICS

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STTS2002

SPD EEPROM operation

Doc ID 15389 Rev 5

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5.6.2

Current address read - SPD

For the current address read operation, following a start condition, the bus master only

sends a device select code with the RW bit set to 1. The device acknowledges this, and

outputs the byte addressed by the internal address counter. The counter is then

incremented. The bus master terminates the transfer with a stop condition, as shown in

Figure 14, without acknowledging the byte.

5.6.3

Sequential read - SPD

This operation can be used after a current address read or a random address read. The bus

master does acknowledge the data byte output, and sends additional clock pulses so that

the device continues to output the next byte in sequence. To terminate the stream of bytes,

the bus master must not acknowledge the last byte, and must generate a stop condition, as

shown in Figure 14.

The output data comes from consecutive addresses, with the internal address counter

automatically incremented after each byte output. After the last memory address, the

address counter ‘rolls-over’, and the device continues to output data from memory address

00h.

5.6.4

Acknowledge in read mode

For all read commands, the device waits, after each byte read, for an acknowledgment

during the 9th bit time. If the bus master does not drive serial data (SDA) low during this

time, the device terminates the data transfer and switches to its standby mode.

Table 25 and Table 26 on page 38 show how the Ack bits can be used to identify the write-

protection status.

Table 25.

Acknowledge when writing data or defining the write-protection

(instructions with R/W bit = 0)

Status

Instruction

Ack

Address

Ack

Data byte

Ack

Write

cycle(tW)

Permanently

protected

PSWP, SWP or

CWP

NoAck

Not

significant

NoAck

Not

significant

NoAck

Page or byte write in

lower 128 bytes

Ack

Address

Ack

Data

NoAck

Protected

with SWP

SWP

NoAck

Not

significant

NoAck

Not

significant

NoAck

CWP

Ack

Not

significant

Ack

Not

significant

Ack

Yes

PSWP

Ack

Not

significant

Ack

Not

significant

Ack

Yes

Page or byte write in

lower 128 bytes

Ack

Address

Ack

Data

NoAck

Not

Protected

PSWP, SWP or

CWP

Ack

Not

significant

Ack

Not

significant

Ack

Yes

Page or byte write

Ack

Address

Ack

Data

Ack

Yes

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