CC2420-RTR1 datasheet(53/92 Pages) TI

53 / 92 page

CC2420

SWRS041B

Page 53 of 89

The battery monitor is controlled through

the BATTMON control register. The battery

monitor is enabled and disabled using the

BATTMON.BATTMON_EN

control bit. The

voltage regulator must also be enabled

when using the battery monitor.

The battery monitor status bit is available

in the BATTMON.BATTMON_OK status bit.

This bit is high when the VREG_IN input

voltage is higher than the toggle voltage

Vtoggle.

The battery monitor toggle voltage is set in

the 5-bit BATTMON.BATTMON_VOLTAGE

control bits. BATTMON_VOLTAGE is an

unsigned, positive number from 0 to 31.

The toggle voltage is given by:

toggle

LTAGE

BATTMON_VO

−

⋅

Alternatively, for a desired toggle voltage,

BATTMON_VOLTAGE

should

set

according to:

toggle

⋅

−

LTAGE

BATTMON_VO

The voltage regulator must be enabled for

least

100

µs

before

the

first

measurement. After being enabled, the

BATTMON_OK

status bit needs 2 µs to

settle for each new toggle voltage

programmed.

The main performance characteristics of

the battery monitor is shown in the

Electrical Specifications section on page

31 Crystal Oscillator

An external clock signal or the internal

crystal oscillator can be used as main

frequency

reference.

The

reference

frequency must be 16 MHz. Because the

crystal frequency is used as reference for

the data rate as well as other internal

signal

processing

functions,

other

frequencies cannot be used.

If an external clock signal is used this

should be connected to XOSC16_Q1, while

XOSC16_Q2

should be left open. The

MAIN.XOSC16M_BYPASS

bit must be set

when an external clock signal is used.

Using the internal crystal oscillator, the

crystal must be connected between the

XOSC16_Q1

and XOSC16_Q2 pins. The

oscillator is designed for parallel mode

operation of the crystal. In addition,

loading capacitors (C381 and C391) for the

crystal are required. The loading capacitor

values

depend

the

total

load

capacitance, CL, specified for the crystal.

The total load capacitance seen between

the crystal terminals should equal CL for

the crystal to oscillate at the specified

frequency.

parasitic

391

381

The parasitic capacitance is constituted by

pin input capacitance and PCB stray

capacitance.

The

total

parasitic

capacitance is typically 2 pF - 5 pF.

The crystal oscillator circuit is shown in

Figure 30. Typical component values for

different values of CL are given in Table

10.

The

crystal

oscillator

amplitude

regulated. This means that a high current

is used to start up the oscillations. When

the amplitude builds up, the current is

reduced to what is necessary to maintain

a stable oscillation. This ensures a fast

start-up and keeps the drive level to a

minimum. The ESR of the crystal must be

within the specification in order to ensure

a reliable start-up (see the Electrical

Specifications section).

CC2420-RTR1 数据表(PDF) 53 Page - Texas Instruments

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