Data Sheet

ADIS16136

Rev. A | Page 3 of 20

SPECIFICATIONS

Table 1.

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

GYROSCOPES

Dynamic Range

±450

±480

°/sec

Initial Sensitivity

GYRO_OUT, GYRO_OUT2 (24 bits)

°/sec/LSB

Initial Sensitivity Tolerance

±1

%

Sensitivity Temperature Coefficient

±35

ppm/°C

Nonlinearity

Best fit straight line, ±400°/sec

±0.05

% of FS

Initial Bias Error

1 σ

±0.15

°/sec

Bias Temperature Coefficient

±0.00125

°/sec/°C

In-Run Bias Stability

25°C, SMPL_PRD = 0x000F

4

°/hr

Angular Random Walk

1 σ, 25°C

0.167

°/√hr

Linear Acceleration Effect on Bias

1 σ

0.017

°/sec/g

Bias Voltage Sensitivity

VDD = 4.75 V to 5.25 V, 1 σ

±0.08

°/sec/V

Misalignment

Axis-to-frame (package)

±1.0

Degrees

Output Noise

No filtering

0.11

°/sec rms

Rate Noise Density

f = 25 Hz, no filtering

0.00357

°/sec/√Hz rms

3 dB Bandwidth

380

Hz

Sensor Resonant Frequency

15.5

17.5

20

kHz

LOGIC INPUTS1

2.0

V

0.8

V

±0.2

±1

µA

All Pins Except RST

40

60

μA

RST Pin

80

μA

10

pF

DIGITAL OUTPUTS1

2.4

V

0.4

V

FLASH MEMORY

Endurance2

10,000

Cycles

Data Retention2

20

Years

FUNCTIONAL TIMES3

Time until data is available

Power-On Start-Up Time

245

ms

Reset Recovery Time

128

ms

Sleep Mode Recovery Time

2.5

ms

Flash Memory Update

72

ms

Flash Memory Self Test

21

ms

Automatic Sensor Self Test Time

SMPL_PRD ≠ 0x0000

110

ms

CONVERSION RATE

6804

2048

kSPS

Clock Accuracy

SMPL_PRD = 0x000F

±3

%

Sync Input Clock

SMPL_PRD = 0x0000

6804

2048

kHz

POWER SUPPLY

Operating voltage range, VDD

4.75

5.0

5.25

V

Power Supply Current

SMPL_PRD = 0x001F

120

mA

Sleep mode

1.4

mA

1

The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.

2

JEDEC Standard 22, Method A117. Endurance measured at −40°C, +25°C, +85°C, and +125°C.

3

These times do not include thermal settling and internal filter response times, which may affect overall accuracy.

4

The sync input clock and internal sampling clock function below the specified minimum value, at reduced performance levels.