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ADP1047ARQZ-R7 数据表(PDF) 29 Page - Analog Devices

部件名 ADP1047ARQZ-R7
功能描述  Digital Power Factor Correction Controller
PDF  84 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1047ARQZ-R7 数据表(HTML) 29 Page - Analog Devices

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Data Sheet
ADP1047/ADP1048
Rev. 0 | Page 29 of 84
MONITORING FUNCTIONS
Voltage, current, power, and temperature measurements are
taken by the ADP1047/ADP1048. These values are stored in
the following registers and can be read through the PMBus
interface.
Input voltage measurement (Register 0x88)
Output voltage measurement (Register 0x8B)
Input current measurement (Register 0x89)
Input power measurement (Register 0x97)
Temperature measurement (Register 0xFE86)
FIRST ERROR FAULT
The ADP1047/ADP1048 provide a FLAG_FAULT_ID register
(Register 0xFE07) that records the first fault that causes a system
shutdown. For example, if the overtemperature (OT) fault causes
the system to shut down, the OT_FAULT flag (0011) is stored in
the FLAG_ FAULT_ID register (Register 0xFE07, Bits[3:0]). In
addition, the flag ID of the fault that occurred before the fault
that caused the system shutdown is included in Bits[7:4] of
Register 0xFE07.
The contents of this register are stored until read by the user. The
flag ID is also saved in EEPROM when the shutdown occurs. In
this way, it is possible to determine the cause of a shutdown in
case of system failure.
OVERTEMPERATURE PROTECTION (OTP)
If the temperature sensed at the RTD pin exceeds the program-
mable fault threshold, the OTP flag is set, and the power supply
can be programmed to shut down. A PTC or NTC thermistor
can be used.
To set the fault and warning thresholds for OTP, program
Register 0xFE19 and Register 0xFE1A, respectively. To set the
temperature hysteresis for the fault and warning thresholds,
program Register 0xFE3F. The response to an OTP fault flag
is programmable in Register 0x50.
AC_OK AND PGOOD SIGNALS
The ADP1047/ADP1048 have two digital status pins: AC_OK
and PGOOD. Both signals represent an OR function for a pro-
grammable list of internal flags. Users can blank some of these
flags to tailor the AC_OK and PGOOD signals to their needs
using Register 0xFE0B and Register 0xFE0A, respectively.
When the signals on the AC_OK and PGOOD pins are set,
the corresponding internal flag is also set.
The programmable delay block acts like a debounce. That is, the
signal must be active for at least the duration of the programmed
delay before the flag is set. The debounce times for the AC_OK and
PGOOD pins can be programmed separately in Register 0xFE05.
REG 0xFE0A
PROGRAMMABLE
DELAY BLOCK
PGOOD_FLAGS_LIST
(PROGRAMMABLE
LIST OF FLAGS)
PGOOD
REG 0xFE0B
PROGRAMMABLE
DELAY BLOCK
AC_OK_FLAGS_LIST
(PROGRAMMABLE
LIST OF FLAGS)
AC_OK
Figure 27. AC_OK and PGOOD Signals
Table 13. Flags Available to Program the AC_OK and PGOOD Pins
AC_OK_FLAGS_LIST (Register 0xFE0B)1
PGOOD_FLAGS_LIST (Register 0xFE0A)1
VIN_LOW (always checked)
VOUT_OV_FAULT (always checked)
VIN_UV_FAULT (Bit 7)
VOUT_UV_FAULT (Bit 7)
VIN_UV_WARN (Bit 6)
VOUT_OV_WARN (Bit 6)
IIN_OC_FAULT (Bit 5)
FAST_OVP (Bit 5)
IIN_OC_WARN (Bit 4)
OLP (Bit 4)
FAST_OCP (Bit 3)
FAST_OCP (Bit 3)
AC_LINE_PERIOD (Bit 2)
IIN_OC_FAULT (Bit 2)
BROWN_OUT (Bit 1)
OT_FAULT (Bit 1)
INRUSH (Bit 0)
FAST_LOOP (Bit 0)
1 To blank one or more flags so that the AC_OK or PGOOD pin ignores it, set the corresponding bit to 1 in Register 0xFE0A or Register 0xFE0B.



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