ADP1047ARQZ-R7 datasheet(22/84 Pages) AD

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ADP1047/ADP1048

Data Sheet

Rev. 0 | Page 22 of 84

SOFT START PROCEDURE

The PSON signal is used to enable or disable the PFC stage.

After PSON is asserted, the ADP1047/ADP1048 start monitor-

ing VAC and, if the ac line conditions are met, they initiate the

soft start procedure, as shown in Figure 21.

Startup is gated by the rms value of the ac line voltage measured

on one half period of the ac line frequency. When VAC is above

the VIN_ON value, the BROWN_OUT flag is reset and the soft

start sequence is initiated. At the same time, the inrush delay

time and soft start delay time timers begin. Both of these timers

can be programmed to count 0 to 7 line cycles (or 0 to 14 half

line cycles in steps of 2).

After the inrush delay time programmed in Register 0xFE2E,

Bits[2:0], the INRUSH flag is reset and the inrush signal (Pin 17)

is asserted, closing the inrush current relay. (Note that the INRUSH

flag is active low.) The inrush signal is set at the zero crossing of

the ac voltage, if this crossing is detected. This setting allows

zero voltage turn-on if a solid-state switch is used (zero voltage

turn-on is not relevant with mechanical relays).

After the soft start delay time (programmed in Register 0xFE2D,

Bits[5:3]), the output voltage is ramped up according to the soft

start time programmed in Register 0xFE2D, Bits[2:0].

Some of the flags can be blanked during soft start so that the

programmed action of the flag does not take place if the flag

is set during the soft start period (see Register 0xFE08 and

When output voltage regulation is reached and all flags are OK, the

POWER_GOOD# flag is reset and the PGOOD signal (Pin 16)

is set to Logic Level 1. (Note that the POWER_GOOD# flag is

active low.)

The soft start time can be programmed to one of eight values:

112 ms, 168 ms, 224 ms, 280 ms, 392 ms, 504 ms, 616 ms, or

728 ms (set in Register 0xFE2D, Bits[2:0]).

The soft start delay time (Register 0xFE2D, Bits[5:3]) can be

programmed from 0 to 7 full line cycles in increments of 1

(that is, two of the rectified half line cycles).

The inrush delay time (Register 0xFE2E, Bits[2:0]) can be pro-

grammed from 0 to 7 full line cycles in increments of 1 (that is,

two of the rectified half line cycles).

If no zero crossings are detected, the programmed maximum ac

line period, MAX_AC_PERIOD_SET (Register 0xFE28), is used.

LINE FAULT PROTECTIONS

Line faults occur when the ac line is not behaving correctly

and include anomalies such as a missing ac line cycle (can be

partial), brownout, or high distortion levels. When a line fault

occurs, the ADP1047/ADP1048 can be programmed to react

according to the situation.

VIN_ON (REG 0x35)

VIN_OFF (REG 0x36)

VAC

VIN_LOW FLAG

(REG 0x7C[3])

BROWN_OUT FLAG

(REG 0xFE80[2])

INRUSH PIN

VOUT

SOFT START TIME

(REG 0xFE2D[2:0])

INRUSH

DELAY TIME = 2

(REG 0xFE2E[2:0])

SOFT START

DELAY TIME = 3

(REG 0xFE2D[5:3])

Figure 21. Soft Start and Inrush Current Control Timing

ADP1047ARQZ-R7 数据表(PDF) 22 Page - Analog Devices

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