TNETA1500

155.52-MBIT/S SONET/SDH ATM RECEIVER/TRANSMITTER

SDNS021D – MARCH 1994 – REVISED JANUARY 1998

4

POST OFFICE BOX 655303

detailed description

transmit operation

The transmit-cell interface consists of the byte-wide input data (TD0–TD7), input clock (TCKI), start of ATM-cell

input (TXCELL), transmit write-enable input (TWE), and transmit-input FIFO almost-full output (TXAF). Input

data is clocked into the TNETA1500 on low-to-high transitions of TCKI when TWE is low. The transmit-input

FIFO almost-full flag (TXAF) goes active when the transmit FIFO is within five bytes of filling up (the FIFO holds

three complete ATM cells).

The 48-byte information field of the ATM cell is scrambled using a self-synchronizing scrambler polynomial of

all-1s state. The 5-byte ATM header is not scrambled at this step. TXCELL identifies the first byte of the ATM

cell and disables the scrambler. The input data is stored in the transmit-input FIFO and multiplexed into the

SONET/SDH payload after all 53 bytes have been received. If the FIFO does not contain 53 bytes of information

at the start of a cell-insertion cycle, an idle or unassigned cell is sent, dependent on the status of the control

registers. An idle cell is defined as an ATM cell with the 5-byte header set to 00 00 00 01 52 (hex) and the 48-byte

payload set to 6A (hex). An unassigned cell is defined as an ATM cell with the 5-byte header set to 00 00 00

00 55 (hex) and the 48-byte payload set to 6A (hex) (see the controller interface section for more information

on the operation of the control registers).

The transmit section calculates the header-error-check (HEC) byte in the ATM header by default. This implies

that the fifth byte of the ATM cell that is input through the transmit-cell interface is ignored. The HEC byte is

calculated in accordance with the ANSI T1.624-1993 and CCITT recommendation I.432. This feature can be

disabled by setting a bit in the control register.

The transmit operation can be programmed to send either a SONET STS-3c frame or an SDH STM-1 frame.

When SDHENABLE is low, a SONET STS-3c frame is transmitted. When SDHENABLE is high, an STM-1 frame

is transmitted. For both the STS-3c and STM-1 frames, the location of the J1 byte in the path overhead is fixed;

the J1 byte always comes after the third C1 byte of the transport overhead (this is known as location 522). The

data-communication channels (D1 through D12 bytes) in the transport overhead (TOH) are set to a hex value

of FF 00 00. The values for the transport- and path-overhead bytes for both an STS-3c frame and an STM-1

frame are given in Table 1.