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TNETA1500PCM 数据表(PDF) 5 Page - Texas Instruments

部件名 TNETA1500PCM
功能描述  155.52-MBIT/S SONET/SDH ATM RECEIVER/TRANSMITTER
PDF  10 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETA1500PCM 数据表(HTML) 5 Page - Texas Instruments

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TNETA1500
155.52-MBIT/S SONET/SDH ATM RECEIVER/TRANSMITTER
SDNS021D – MARCH 1994 – REVISED JANUARY 1998
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
transmit operation (continued)
Table 1. Transmit Transport-Overhead and Path-Overhead Bytes
SONET FRAME
SDH FRAME
OVERHEAD BYTE
VALUE WHEN
SDHENABLE = LOW
VALUE WHEN
SDHENABLE = HIGH
A1
1111 0110 (F6h)
1111 0110 (F6h)
A2
0010 1000 (28h)
0010 1000 (28h)
C1 bytes
01 02 03 (h)
01 00 00 (h)
B1
B2
Calculated
Calculated
B3
First H1
0110 0010 (62h)
0110 1010 (6Ah)
Second H1 (H1*)
1001 0011 (93h)
1001 1011 (9Bh)
Third H1 (H1*)
1001 0011 (93h)
1001 1011 (9Bh)
First H2
0000 1010 (0Ah)
0000 1010 (0Ah)
Second H2 (H2*)
1111 1111 (FFh)
1111 1111 (FFh)
Third H2 (H2*)
1111 1111 (FFh)
1111 1111 (FFh)
Three H3 bytes
0000 0000 (00h)
0000 0000 (00h)
First K2
Normal operation: 0000 0000
Line FERF: 0000 0110
Normal operation: 0000 0000
Line FERF: 0000 0110
Third Z2
B2 error count:
0000 0000–0001 1000
B2 error count:
0000 0000–0001 1000
J1
0000 0000
0000 0000
C2
0001 0011
0001 0011
G1
Bits 1–4
B3 error count: 0000–1000
Path FERF: 1001
B3 error count: 0000–1000
Path FERF: 1001
G1
Bit 5
Path RDI: 1
Path RDI: 1
Bits 6–8
000
000
H4
0000 0000
0000 0000
The parity byte B1, B2 (three bytes), and B3 are calculated as follows:
B1 – B1 is a bit-interleaved parity-8 code (BIP-8) using even parity. B1 is calculated over all bits of the
previous STS-3c frame after scrambling. The calculated value of B1 is placed in the STS-3c frame before
the frame is scrambled.
B2 – For an STS-3c frame, the three B2 bytes combine to form a BIP-24 code; however, each B2 byte is
calculated as if the frame is composed of three individual STS-1s. Each B2 is calculated over all bits of the
line overhead and STS-1 envelope capacity of the previous STS-1 frame before scrambling, using even
parity. The computed value is placed in the appropriate B2 byte location before scrambling. The line
overhead consists of the six rows of transport-overhead bytes, beginning with the first H1 byte and ending
before the row containing the first A1 byte (see Table 1).
B3 – For an STS-3c frame, the B3 byte is calculated over all bits of the previous STS-3c SPE before
scrambling. B3 is a BIP-8 code using even parity. The computed value is placed in the B3 location before
scrambling.



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