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TNETA1585 数据表(PDF) 28 Page - Texas Instruments |
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TNETA1585 数据表(HTML) 28 Page - Texas Instruments |
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28 / 32 page ![]() TNETA1585 ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES SDNS041A – NOVEMBER 1996 – REVISED JULY 1998 28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 operating characteristics (see Note 6 and Figure 13) coprocessor interface NO. PARAMETER MIN MAX UNIT 1 td(COPFULL) Delay time, from CLOCK ↑ to COPFULL↑ 5 15 ns NOTE 6: The COPFULL signal is asserted high after the last byte of the seventh cell in the UTOPIA FIFO is received by the TNETA1585, or if a new RXSOC is received by the TNETA1585 for the cell that fills the FIFO. It remains high until a cell location is available in the FIFO. CLOCK (input) COPFULL (output) 1 ... Figure 13. COPFULL Timing |
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