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TNETA1585 数据表(PDF) 13 Page - Texas Instruments

部件名 TNETA1585
功能描述  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
PDF  32 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETA1585 数据表(HTML) 13 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
transmitted-cell-indication interface (TCCX) (continued)
Bit 1 (send acknowledge). This bit indicates whether the SAR will send a cell. The bit is encoded as follows:
BIT 1
INDICATION
0
Cell will not be sent.
1
Cell will be sent.
Bit 0 (framing). This bit is set to a 1 to denote the start of a frame.
The frame is transmitted to the coprocessor through the TCCX terminal starting with bit 0. When a frame is not
actively being transmitted, the TCCX terminal is driven to a 0.
data-availability interface (DAX)
A single-bit interface allows the TNETA1575 to signal to the TNETA1585 when data is available or unavailable
on a particular channel. A 13-bit frame is sent to the TNETA1585 for a particular channel only when its
data-availability status changes (i.e., when the host writes to the transmit-queue register to notify the
TNETA1575 that a packet has been queued, or if the TNETA1575 completes segmentation of the last packet
on a particular channel). The frame is formatted as follows:
Channel number (12–2)
Data available/unavailable (1)
Framing (0)
Bits 12–2 (channel number). These bits indicate which one of the 2K channels has available or unavailable data.
Bit 1 (data available/unavailable). This field indicates the new status of the segmentation queue for the given
channel number. This field is encoded as follows:
BIT 1
INDICATION
0
All data has been segmented (data unavailable).
1
New data has been added (data available).
Bit 0 (framing). This bit is set to a 1 to denote the start of a frame.
The frame is transmitted to the TNETA1585 through the DAX terminal starting with bit 0. When a frame is not
actively being transmitted, the DAX terminal is driven to a 0.
COP full-indication interface (COPFULL)
A single-bit interface allows the TNETA1585 to signal to the TNETA1575 the status of the TNETA1585’s
receive-UTOPIA-interface FIFO. When in ATM mode (CONFIG = 0), this output goes high when the
receive-UTOPIA-interface FIFO is full. When in PHY mode (CONFIG = 1), this output goes high when the FIFO
is within four bytes of being full.



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