SMB117 datasheet(25/32 Pages) SUMMIT

25 / 32 page

SMB113A/B/SMB117/A

Preliminary Information

Summit Microelectronics, Inc

2111 2.6 9/16/2010

APPLICATIONS INFORMATION (CONTINUED)

COMPONENT SELECTION

Buck Outputs:

Inductor:

The starting point design of any and DC/DC converter

is the selection of the appropriate inductor for the

application. The optimal inductor value will set the

inductor current at 30% of the maximum expected load

current. The inductors current for a Buck converter is

as follows:

Buck: Equation 1:

Vin

MAX

)

(

−

Where Vo is the output voltage, VIN is the input

voltage, f is the frequency, and IMAX is the max load

current.

For example: For a 1.2V output and a 3.6V input with

a 500mA max load, and a 1MHz switching frequency

the optimal inductor value is:

)

(

−

Choosing the nearest standard inductor value we

select a 5.6uH inductor. It is important that the inductor

has a saturation current level greater than 1.2 times

the max load current.

Other parameters of interest when selecting an

inductor are the DCR (DC winding resistance). This

has a direct impact on the efficiency of the converter.

In general, the smaller the size of the inductor is the

larger the resistance. As the DCR goes up the power

loss increases according to the I

2R relation. As a result

choosing a correct inductor is often a trade off

between size and efficiency.

Input Capacitor

Each converter should have a high value low

impedance input (or bulk) capacitor to act as a current

reservoir for the converter stage. This capacitor should

be either a X5R or X7R MLCC (multi-layer-ceramic

capacitor). The value of this capacitor is normally

chosen to reflect the ratio of the input and output

voltage with respect to the output capacitor. Typical

values range from 2.2uF to 10uF.

For Buck converters, the input capacitor supplies

square wave current to the inductor and thus it is

critical to place this capacitor as close to the PFET as

possible in order to minimize trace inductance that

would otherwise limit the rate of change of the current.

Output capacitor

Each converter should have a high value low

impedance output capacitor to act as a current

reservoir for current transients and to. This capacitor

should be either a X5R or X7R MLCC.

For a Buck converter, the value of this capacitance is

determined by the maximum expected transient

current. Since the converter has a finite response time,

during a load transient the current is provided by the

output capacitor. Since the voltage across the

capacitor drops proportionally to the capacitance, a

higher output capacitor reduces the voltage drop until

the feedback loop can react to increase the voltage to

equilibrium.

The voltage drop can be calculated according to:

Equation 2

Where I is the load or transient current, T is the time

the output capacitor is supporting the output and C is

the output capacitance. Typical values range from

10uF to 44uF.

Other important capacitor parameters include the

Equivalent Series Resistance (E.S.R) of the capacitor.

The ESR in conjunction with the ripple current

determines the ripple voltage on the output, for typical

values of MLCC the ESR ranges from 2-10m

Ω. In

addition, carful attention must be paid to the voltage

rating of the capacitor the voltage rating of a capacitor

must never be exceeded. In addition, the DC bias

voltage rating can reduce the measured capacitance

by as much as 50% when the voltage is at half of the

max rating, make sure to look at the DC bias de-rating

curves when selecting a capacitor.

MOSFETS

When selecting the appropriate FET to use attention

must be paid to the gate to source rating, input

capacitance, and maximum power dissipation.

Most FETs are specified by an on resistance (RDSON)

for a given gate to source voltage (VGS). It is essential

to ensure that the FETs used will always have a VGS

voltage grater then the minimum value shown on the

datasheet. It is worth noting that the specified VGS

voltage must not be confused with the threshold

voltage of the FET.

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