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AS3502 数据表(PDF) 4 Page - ams AG |
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AS3502 数据表(HTML) 4 Page - ams AG |
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4 / 29 page ![]() REV. M Page 4 September 1998 AS3502 Pin Description (continued) Pin # Name Type Function 19 SCLK DI Serial PCM Shift Clock Input This pin acts as shift clock input signal for the externally provided signal for serial PCM data transfer. The frequency may vary from 128 kHz to 4.096 MHz in 8 kHz increments and should be synchronized to MCLK. In the receive direction the bitstream is latched with the falling edge of this clock. In the transmit direction the bitstream is shifted out with the rising edges of this clock. 20 MCLK DI Master Clock Input This signal is the timing reference for all internal operations. The clock frequency must be a integer multiple of 2.048 MHz with a maximum of 18.432MHz and must be synchronized to SCLK. The required master clock dividing ratio is selected by setting the DIV3 -DIV0 bits in the Digital Control Register. 21 GND SI Digital Negative Supply Voltage Input 22 23 TR+ TR- DO DO Differential Toneringer Outputs These digital outputs provide square or sine wave signal for driving transducers directly. TRO+ and TRO- are operating in push/pull mode providing peak to peak voltage swing of 2 x VDD.The output volume is programmable and is accomplished either through pulse density modulation or through pulse width modulation. 24 25 EP- EP+ AO AO Differential Earpiece Outputs These two pins are the outputs of the differential earpiece amplifier driving either dynamic earpieces with 150 Ω impedance or ceramic transducers with up to 50nF directly. The signal reference on both pins is DC referenced to the internally gen- erated Analogue Ground which is appr. 1/2 VDD. 26 AVSS SI Analogue Negative Supply Voltage Input 27 28 SP+ SP- AO AO Differential Loudspeaker Outputs These two pins are the outputs of the differential loudspeaker amplifier that is ca- pable driving dynamic speakers with 50 Ω impedance directly. The maximum output power is 50mW. The signal reference on both pins is DC referenced to the internally generated Analogue Ground which is appr. 1/2 VDD. AI: Analogue Input AO: Analogue Output DI: Digital Input DO: Digital Output DI/O: Digital Input/Output SI: Supply Input |
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