AS3502 datasheet(6/29 Pages) AMSCO

6 / 29 page

REV. M

Page 6

September 1998

AS3502

shifted out of the encoder under control of an

externally applied shift clock signal SCLK.

In case of 8-bit companded mode the voice band

signals are converted to a PCM two's complement 7

data bit plus sign bit A-Law format with a sample rate

of 8 kHz and shifted out of the encoder under control

of an externally applied shift clock signal SCLK.

Receive Section

In case of 16 bit linear mode PCM data is shifted into

the input shift register at a clock rate determined by

the shift clock SCLK every 128 µs. 13 bits of PCM

data are transferred to the receive latch that holds the

data throughout the conversion process.

In case of 8-bit companded mode PCM data is shifted

into the input shift register at a clock rate determined

by the shift clock SCLK every 128µs and converted

from A-Law format to 13-bit linear format. Optionally a

programmable digital sidetone stage adds a certain

amount of the transmit signal to the receive path for

natural acoustic performance. The sidetone range can

be adjusted from -48 dB to 0 dB with a default value

of -18 dB. Both signals are combined and fed to a

digital gain setting stage which allows to program the

gain from -42 to +6 dB with a tolerance of ±0.05 dB

from 0 to -6dB to compensate for transducer

sensitivity

variations.

The

same

stage

may

additionally be used for digital volume control for

receive volume attenuation. This feature may be used

for

software

based

handsfree

voice

switching

algorithms. The gainsetting stage is followed by a

digital filter that bandlimits the signal according to

CCITT recommendations and that converts the

resolution in amplitude to resolution in time through

interpolation. The output signal is fed to a digital 2nd

order sigma delta modulator with a sampling rate of

1.024 MHz. The bit stream is further fed to a

combined 1 bit DAC / 2nd order SC Lowpass filter

with an corner frequency of 8 kHz and further to a 1st

order

active

smoothing

filter

that

provides

additional filtering of out of band signals.

The loudspeaker volume may be controlled digitally

through the Receive Digital Gain Register DGR.

Tone Generator

AS3502 contains a powerful tone generator that is

capable of generating all European country specific

ring/ call progress tones and DTMF tones for audible

feedback in the receive path or inband signalling

tones in the transmit path under software control.

The

tone

generator

operation

modes

are

programmable through 13 8-bit registers that are

accessed through the serial control interface. (See

melody functions are handled by the AS3502 tone

generator hardware only a minimum amount of

software overhead for the controlling microprocessor

is necessary.

The tone generator consists of a single /dual tone

synthesizer, a six tone sequencer, a cadence counter

and a repetition counter.

Frequency Generator

For in band signalling a square wave or sine signal

with precise DTMF capability is generated. The tones

may be added to the receive section or injected into

the transmit section. For tone ringing a square wave

push/pull signal is generated on the TRO+ and TRO-.

digital outputs.

Transmit Tone Volume Control

For sine wave forms the transmit PCM level is

controlled by a 0 /-2.5 dB attenuation block and

additionally by the digital transmit gain stage (DGX).

For square wave forms the transmit PCM level is

controlled by the V1 register and the DGX register.

Receive Tone Volume Control

The receive amplitude of sine wave signals may be

controlled via the V2 register.

The receive amplitude of square wave signals may be

controlled by both the V1 and the V2 register.

Tone Ringer Volume Control

The output volume is programmable through the V1

density modulation or through pulse width modulation.

For pulse density volume control the amplitude is

controlled through the V1 register.

T/2

Start Melody

TRO+

TRO-

PW = 0

Pulse Density Volume Control

For pulse width volume control the R0 counter is used

where it generates the duty cycle. In this case the

repetition has to be controlled by the microprocessor

through software.

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