AS3502 datasheet(5/29 Pages) AMSCO

5 / 29 page

REV. M

Page 5

September 1998

AS3502

Functional Description

Power-On Reset

When power is applied first a power on reset signal is

generated on chip which initializes AS3502:

The on chip programmable AFE registers are set to

their default values (those values are defined in the

set to the default status and the serial interface is ini-

tialized. AS3502 remains in power down state until a

software start-up command. An active Low signal with

a duration of min. 25 µs on the power on reset pin can

be used to externally reset the device AS3502. For

normal operation this pin must be pulled High.

Power Up Mode

AS3502 is powered up through a one byte start-up

command. The byte written into the Digital Control

and the receive section. If the transmit channel is en-

abled first, the receive channel may be enabled any

time without any restrictions. On enabling the receive

channel and subsequent enabling of the transmit

channel the PCM strobe signals TXS and RXS have

to be tied together. The configuration information

written into the AC and AG define which analogue

transducer interfaces will be enabled on power up.

The PCM output TXD remains in Tristate until the

second frame synchronization signal after start-up.

Any of the programmable registers may be modified

while AS3502 is in active mode.

Power Down Mode

In power down mode all chip functions except the se-

rial interface are kept inactive. All analogue functions

are powered down and all digital outputs are put into

Tristate mode. In this operating state the internal

registers are normally configured to the desired

values prior to the start-up command. The chip can

be brought into power down mode any time through a

power down command written into the DC Register. In

this case all programmable registers retain their pro-

grammed values.

Analogue Input interface

The AS3502 input interface provides two identical dif-

ferential inputs e.g. for a handset microphone and for

a handsfree microphone. The input sources are se-

lected through the AG register. Clipping of signals

with arbitrary DC offset must be avoided by capacitive

coupling. The input impedance of 2 x 30 k

Ω is

compatible

with

both

electret

and

dynamic

microphones. Each input is connected through an

analogue input multiplexer to a low noise high gain

preamplifier. The gain is software programmable

through register AG from +16 to +46 dB in 6 dB steps

with a tolerance of ±0.2 dB. This wide range

guarantees optimum usage of the A/D converter dy-

namic range with various transducers.

Analogue Output Interface

The AS3502 output interface provides differential

outputs for an earpiece, for a loudspeaker and for a

toneringer. The output stages are selected through

the AC register. The earpiece output driver is a fully

differential amplifier that is capable of driving 3.2Vpp

into

150

Ω transducer directly and is gain

programmable in three steps from -12 dB to +6 dB

through the AG register. The +6 dB step allows to

drive ceramic earpiece transducers or to boost the re-

ceive amplitude. The loudspeaker driver is a fully

differential power amplifier with a peak output power

of 50 mW into a 50

Ω loudspeaker. This output allows

loudhearing and handsfree operation under software

control.

The tone ringer outputs are digital push/pull outputs

with rail to rail voltage swing that capable of driving

various toneringers. For volume control the output

signal may be either pulse density modulated or pulse

width modulated under software control.

Transmit Section

The scaled analogue input signal enters a 1st order

RC antialiasing filter with a corner frequency of

approx. 40 kHz. This filter eliminates the need for any

off chip filtering as it provides sufficient attenuation at

1.024 MHz to avoid aliasing. From there the bandlim-

ited signal is fed to a 2nd order Sigma Delta modula-

tor with a sampling frequency of 1.024 MHz. A factory

trimmed

voltage

reference

guarantees

accurate

absolute transmit gain (0 dBm0 reference level). The

modulator is followed by a digital decimation filter that

transforms the resolution in time to resolution in

amplitude. The decimation filter is followed by a mini-

mum phase 5th order IIR filter implementing the

CCITT lowpass portion of the encoder bandpass fre-

quency characteristics. Finally a 3rd order IIR high

pass filter implements the highpass portion of the en-

coder bandpass frequency characteristics according

to CCITT specifications.

The digitally filtered signal is further fed to a digital

gain setting stage which allows to program the gain

from -38 to +10 dB with a tolerance of better than

±0.05 dB from 0 to +6 dB to compensate for

transducer sensitivity variations. The same stage may

additionally be used for digital volume control for

transmit volume attenuation. This feature may be

used for software based handsfree voice switching

algorithms.

In case of 16 bit linear mode the voice band signals

are converted to a PCM two's complement 12 data bit

plus sign bit format with a sample rate of 8 kHz and

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