AD8151AST datasheet(20/36 Pages) AD

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AD8151

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The power dissipated in the data path outputs is affected by several

factors. The ﬁrst is whether the outputs are enabled or disabled.

The worst case occurs when all of the outputs are enabled.

The current consumed by the data path logic can be approxi-

mated by:

ICC = 35 mA + [4.5 mA + (IOUT/20 mA

× 3 mA)]

× (# of outputs enabled)

This says that there will always be a minimum of 35 mA flow-

ing. ICC will increase by a factor that is proportional to both the

number of enabled outputs and the programmed output current.

The power dissipated in this circuit section will simply be the

voltage of this section (VCC – VEE) times the current. For a worst

case, assume that VCC – VEE is 5.0 V, all outputs are enabled

and the programmed output current is 25 mA. The power dissi-

pated by the data path logic will be:

P = 5.0 V {35 mA + [4.5 mA + (25 mA/20 mA

× 3 mA)]

× 17} = 876 mW

The power dissipated by the output current depends on several

factors. These are the programmed output current, the voltage

drop from a logic low output to VEE and the number of enabled

outputs. A simplifying assumption is that one of each (enabled)

differential output pair will be low and draw the full output

current (and dissipate most of the power for that output), while

the complementary output of the pair will be high and draw

insigniﬁcant current. Thus, its power dissipation of the high

output can be ignored and the output power dissipation for each

output can be assumed to occur in a single static low output

that sinks the full output-programmed current.

The voltage across which this current flows can also vary, depend-

ing on the output circuit design and the supplies that are used

for the data path circuitry. In general, however, there will be a

voltage difference between a logic low signal and VEE. This is

the drop across which the output current flows. For a worst

case, this voltage can be as high as 3.5 V. Thus, for all outputs

enabled and the programmed output current set to 25 mA, the

power dissipated by the outputs:

P = 3.5 V (25 mA)

× 17 = 1.49 W

HEAT SINKING

Depending on several factors in its operation, the AD8151 can

dissipate upwards of 2 W or more. The part is designed to oper-

ate without the need for an explicit external heatsink. However,

the package design offers enhanced heat removal via some of the

package pins to the PC board traces.

The VEE pins on the input sides of the package (Pins 1 to 46 and

Pins 93 to 138) have “ﬁnger” extensions inside the package

that connect to the “paddle” upon which the IC chip is mounted.

These pins provide a lower thermal resistance from the IC to

the VEE pins than other pins that just have a bond wire. As a

result these pins can be used to enhance the heat removal pro-

cess from the IC to the circuit board and ultimately to the ambient.

The VEE pins described above should be connected to a large area

of circuit board trace material in order to take most advantage

their lower thermal resistance. If there is a large area available

on an inner layer that is at VEE potential, then vias can be pro-

vided from the package pin traces to this layer. There should be

no thermal-relief pattern when connecting the vias to the inner

layers for these VEE pins. Additional vias in parallel and close to

the pin leads can provide an even lower thermal resistive path. If

possible to use, 2 oz. copper foil will provide better heat removal

than 1 oz.

The AD8151 package has a speciﬁed thermal impedance

θJA of

°C/W. This is the worst case, still-air value that can be expected

when the circuit board does not signiﬁcantly enhance the heat

removal from the package. By using the concept described above

or by using forced-air circulation, the thermal impedance can be

lowered.

For an extreme worst case analysis, the junction rise above the

ambient can be calculated assuming 2 W of power dissipation

and

JA of 30

°C/W to yield a 60°C rise above the ambient. There

are many techniques described above that can mitigate this situa-

tion. Most actual circuits will not result in this high a rise of the

junction temperature above the ambient.

APPLICATIONS

AD8151 INPUT AND OUTPUT BUSING

Although the AD8151 is a digital part, in any application that

runs at high speed, analog design details will have to be given very

careful consideration. At high data rates, the design of the signal

channels will have a strong influence on the data integrity and

its associated jitter and ultimately bit error rate (BER).

While it might be considered very helpful to have a suggested

circuit board layout for any particular system conﬁguration,

this is not something that can be practically realized. Systems

come in all shapes, sizes, speeds, performance criteria and cost

constraints. Therefore, some general design guidelines will be

presented that can be used for all systems and judiciously modi-

ﬁed where appropriate.

High-speed signals travel best, i.e. maintain their integrity, when

they are carried by a uniform transmission line that is properly

terminated at either end. Any abrupt mismatches in impedance

or improper termination will create reflections that will add to

or subtract from parts of the desired signal. Small amounts of

this effect are unavoidable, but too much will distort the signal

to the point that the channel BER will increase. It is difﬁcult to

fully quantify these effects, because they are influenced by many

factors in the overall system design.

A constant-impedance transmission line is characterized by

having a uniform cross-section proﬁle over its entire length. In

particular, there should be no “stubs,” which are branches that

intersect the main run of the transmission line. These can have

an electrical “appearance” that is approximated by a lumped

element, such as a capacitor, or if long enough, as another trans-

mission line. To the extent that stubs are unavoidable in a design,

their effect can be minimized by making them as short as pos-

sible and as high an impedance as possible.

Figure 13 shows a differential transmission line that connects

two differential outputs from AD8151s to a generic receiver. A

more generalized system can have more outputs bused, and

more receivers on the same bus, but all the same concepts apply.

The inputs of the AD8151 can also be considered as a receiver.

The transmission lines that bus all of the devices together are

shown with terminations at each end.

The individual outputs of the AD8151 are stubs that intersect

the main transmission line. Ideally, their current-source outputs

would be inﬁnite impedance, and they would have no effect on

signals that propagate along the transmission line. In reality, each

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