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AD9430/PCB-CMOS 数据表(PDF) 8 Page - Analog Devices |
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AD9430/PCB-CMOS 数据表(HTML) 8 Page - Analog Devices |
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8 / 20 page ![]() PRELIMINARY TECHNICAL DATA AD9430 -8- 4/01/2002 REV. PrG PIN FUNCTION DESCRIPTIONS (CMOS mode) CMOS Mode Pin Number Name Function in CMOS Mode 2,7,42,43,65,66,68 DNC Do not connect 1 S5 Full Scale Adjust pin : ‘1’ sets FS = .766 Vpp differential, ‘0’ sets FS = 1.533 Vpp differential 3 S4 Interlaced or parallel output mode. (only in Dual Port mode operation) HIGH = data arrives in channel A at falling edge of clock and data arrives in channel A at rising edge of clock. LOW = data arrives in channels A and B at rising edge of clock. 5 S2 Output Mode select. Low = Dual Port, CMOS; High = LVDS 6 S1 Data format select. Low = Binary, High = Two’s compliment 8,14,15,18,19,24,27,28,29,34, 39,40,88,89,90,94,95,98,99 AVDD 3.3V analog supply. (3.0V to 3.6V) 4,9,12,13,16,17,20,23,25,26,3 0,31,35,38,41,86,87,91,92,93, 96,97,100 AGND Analog Ground 10 SENSE Control Pin for Reference , Full Scale 11 VREF 1.235 Reference I/O - function dependent on REFSENSE 21 VIN+ Analog input – true. 22 VIN- Analog input – compliment. 32 DS+ Data sync (input) – true. Aligns output channels so that data from channel A represents a sample that is prior from data in channel B, taking into account the pipeline delay. (See timing diagram). Tie LOW if not used. 33 DS- Data sync (input) – compliment. Tie HIGH if not used. 36 ENC+ Clock input – true. 37 ENC- Clock input – compliment. 44 DB0 B Port Output Data Bit (LSB) 45 DB1 B Port Output Data Bit 46 DB2 B Port Output Data Bit 49 DB3 B Port Output Data Bit 50 DB4 B Port Output Data Bit 51 DB5 B Port Output Data Bit 52 DB6 B Port Output Data Bit 55 DB7 B Port Output Data Bit 56 DB8 B Port Output Data Bit 57 DB9 B Port Output Data Bit 58 DB10 B Port Output Data Bit 59 DB11 B Port Output Data Bit (MSB) 60 OR_B B Port Overrange 48,53,61,67,74,82 DrGND Digital ground. 47,54,62,75,83 DrVDD 3.3V digital output supply. (3.0V to 3.6V) 63 DCO- Data Clock output – compliment. 64 DCO+ Data Clock output – true. 69 DA0 A port Output Data Bit (LSB) 70 DA1 A port Output Data Bit 71 DA2 A port Output Data Bit 72 DA3 A port Output Data Bit 73 DA4 A port Output Data Bit 76 DA5 A port Output Data Bit 77 DA6 A port Output Data Bit 78 DA7 A port Output Data Bit 79 DA8 A port Output Data Bit 80 DA9 A port Output Data Bit 81 DA10 A port Output Data Bit 84 DA11 A port Output Data Bit (MSB) 85 OR_A A port Overrange |
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