AD9873JS datasheet(3/39 Pages) AD

3 / 39 page

REV. 0

–3–

AD9873

(VAS = 3.3 V

5%, VDS = 3.3 V

10%, fOSCIN = 27 MHz, fSYSCLK = 216 MHz, fMCLK = 54 MHz

(M = 8, N = 4), ADC Sample Rate derived from PLL fMCLK , RSET = 10 k , 75

DAC Load)

Test

Parameter

Temp

Level

Min

Typ

Max

Unit

SYSTEM CLOCK, DAC SAMPLING fSYSCLK

Frequency Range

Full

III

232

MHz

OSC IN and XTAL CHARACTERISTICS

Frequency Range

Full

III

MHz

Duty Cycle

25 C

III

Input Capacitance

25 CIV

Input Resistance

25 C

100

Ω

MCLK OUT JITTER (fMCLK Derived from PLL)

25 C

ps rms

TxDAC CHARACTERISTICS

Resolution

N/A

Bits

Full-Scale Output Current

Full

III

Gain Error (Using Internal Reference)

25 C

–3

0.14

% FS

Output Offset

25 C

–1

% FS

Reference Voltage (REFIO Level)

°C

1.18

1.23

1.28

Differential Nonlinearity (DNL)

25 CIV

±2.5

LSB

Integral Nonlinearity (INL)

25 CIV

±8

LSB

Output Capacitance

25 CIV

Phase Noise @ 1 kHz Offset, 42 MHz

25 C

–113

dBc/Hz

Output Voltage Compliance Range

Full

III

–0.5

+1.5

Wideband SFDR

5 MHz Analog Out, IOUT = 4 mA

25 C

dBc

65 MHz Analog Out, IOUT = 4 mA

25 C

dBc

Narrowband SFDR ( 100 kHz Window)

65 MHz Analog Out, IOUT = 4 mA

25 C

dBc

Tx MODULATOR CHARACTERISTICS

I/Q Offset

Full

III

Pass Band Amplitude Ripple (f < fIQCLK/8)

Full

III

0.1

Pass Band Amplitude Ripple (f < fIQCLK/4)

Full

III

0.5

Stop Band Response (f > fIQCLK

× 3/4)

Full

III

–63

8-BIT ADC CHARACTERISTICS

Resolution

N/A

Bits

Conversion Rate

Full

III

16.5

MHz

Pipeline Delay

N/A

3.5

ADC Cycles

DC Accuracy

Differential Nonlinearity

25 CIV

0.5

LSB

Integral Nonlinearity

25 CIV

0.5

LSB

Offset Error for Each 8-Bit ADC

25 CIV

0.75

% FSR

Gain Error for Each 8-Bit ADC

25 CIV

% FSR

Offset Matching Between 8-Bit ADCs

Full

LSB

Gain Matching Between 8-Bit ADCs

Full

4.5

LSB

Analog Input

Input Voltage Range

Full

V p-p

Input Capacitance

25 C

1.4

Differential Input Resistance

25 CIV

Ω

Aperture Delay

25 C

2.0

Aperture Uncertainty (Jitter)

25 C

1.2

ps rms

Input Bandwidth (–3 dB)

25 C

MHz

Input Referred Noise

25 C

600

µV

Reference Voltage Error

REFT8–REFB8 (0.5 V)

25 CI

±4

±92

Dynamic Performance (AIN = –0.5 dB FS, f = 5 MHz)

Signal-to-Noise and Distortion Ratio (SINAD)

Full

43.5

SPECIFICATIONS

AD9873JS 数据表(PDF) 3 Page - Analog Devices

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AD9873JS 数据表(PDF) 3 Page - Analog Devices

AD9873JS 数据表(HTML) 3 Page - Analog Devices

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