ADP2380AREZ-R7 datasheet(13/28 Pages) AD

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Data Sheet

ADP2380

Rev. 0 | Page 13 of 28

THEORY OF OPERATION

The ADP2380 is a synchronous, step-down, dc-to-dc regulator.

It uses current mode architecture with an integrated high-side

power switch and a low-side driver. It targets high performance

applications that require high efficiency and design flexibility.

The ADP2380 can operate with an input voltage from 4.5 V to

20 V and regulate the output voltage down to 0.6 V. Additional

features for design flexibility include programmable switching

frequency, soft start, external compensation, and power-good pin.

CONTROL SCHEME

The ADP2380 uses fixed frequency, peak current mode PWM

control architecture. At the start of each oscillator cycle, the

high-side N-MOSFET is turned on, putting a positive voltage

across the inductor. Current in the inductor increases until

the current sense signal crosses the peak inductor current thresh-

old that turns off the high-side N-MOSFET and turns on the

low-side N-MOSFET. This puts a negative voltage across the

inductor, causing the inductor current to decrease. The low-

side N-MOSFET stays on for the rest of the cycle.

INTERNAL REGULATOR (VREG)

The internal regulator provides a stable supply for the internal

circuits and provides bias voltage for the low-side gate driver.

Placing a 1 µF ceramic capacitor between VREG and GND is

recommended. The internal regulator also includes a current-

limit circuit to protect the circuit if the maximum external

load is added.

BOOTSTRAP CIRCUITRY

The ADP2380 has integrated the boot regulator to provide the

gate drive voltage for the high-side N-MOSFET. It generates a

5 V bootstrap voltage between BST and SW by differential

sensing.

It is recommended to place a 0.1 µF, X7R or X5R ceramic

capacitor between the BST pin and the SW pin.

LOW-SIDE DRIVER

The LD pin provides the gate driver for the low-side N-channel

MOSFET. Internal circuitry monitors the external MOSFET to

ensure break-before-make switching to prevent cross conduction.

OSCILLATOR

The ADP2380 switching frequency is controlled by the RT pin.

If the RT pin is connected to GND, the switching frequency is

set to 290 kHz. If the RT pin is open, the switching frequency is

set to 540 kHz. A resistor connected from RT to GND can

program the switching frequency according to the following

equation:

]

kΩ

[

600

]

kHz

[

OSC

A 100 kΩ resistor sets the frequency to 500 kHz, and a 215 kΩ

resistor sets the frequency to 250 kHz. Figure 31 shows the typical

relationship between fSW and ROSC.

1400

1200

1000

800

600

400

200

100

140

180

220

260

300

ROSC (kΩ)

Figure 31. Switching Frequency vs. ROSC

SYNCHRONIZATION

To synchronize the ADP2380, connect an external clock to the

SYNC pin. The frequency of the external clock can be in the

range of 250 kHz to 1.4 MHz. During synchronization, the

switching rising edge runs 180° out of phase with the external

clock rising edge.

When the ADP2380 is being synchronized, connect a resistor

from the RT pin to GND to program the internal oscillator to

run at 90% to 110% of the external synchronization clock.

ENABLE AND SOFT START

When the voltage of the EN/SS pin exceeds 0.5 V, the ADP2380

starts operation.

The ADP2380 has an internal digital soft start. The internal soft

start time can be calculated by using the following equation:

)

(

]

kHz

[

1600

INT

A slow soft start time can be programmed by the EN/SS pin.

Place a capacitor between the EN/SS pin and GND. An internal

current charges this capacitor to establish the soft start ramp.

The soft start time can be calculated by using the following

equation:

EXT

where:

CSS is the soft start capacitance.

ISS_UP is the soft start pull-up current (3.2 µA).

The internal error amplifier includes three positive inputs: the

internal reference voltage, the internal digital soft start voltage,

and the EN/SS voltage. The error amplifier regulates the FB

voltage to the lowest of the three voltages.

ADP2380AREZ-R7 数据表(PDF) 13 Page - Analog Devices

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