SPKVSS

AVSS

DVSS

AINL

AINR

SPKP

SPKM

HPOUT

RST

SPI_SEL

6

6

SPKVDD

AVDD

LDO_SEL

DAC Signal

Proc.

SPI/I

Control Block

PLL

Interrupt

Control

Primary I

Interface

Pin Muxing / Clock Routing

LDO

POR

Mono 6

' DAC

DVDD

IOVDD

Secondary I

Interface

Dig

Vol

miniDSP

6 dB to +24 dB

(6 dB steps)

-6 dB to +29 dB

and Mute

(1 dB steps)

0 dB to -78 dB

and Mute

(Min 0.5 dB steps)

0 dB to -78 dB and Mute

(Min 0.5 dB steps)

0 dB to -78 dB

and Mute

(Min 0.5 dB steps)

TAS2521

SLAS687A – FEBRUARY 2013 – REVISED FEBRUARY 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

Figure 1-1. Simplified Block Diagram

NOTE

This data manual is designed using PDF document-viewing features that allow quick access

to information. For example, performing a global search on "page 0 / register 27" produces

all references to this page and register in a list. This makes is easy to traverse the list and

find all information related to a page and register. Note that the search string must be of the

indicated format. Also, this document includes document hyperlinks to allow the user to

quickly find a document reference. To come back to the original page, click the green left

arrow near the PDF page number at the bottom of the file. The hot-key for this function is alt-

left arrow on the keyboard. Another way to find information quickly is to use the PDF

bookmarks.

2

INTRODUCTION

Copyright © 2013, Texas Instruments Incorporated

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