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TAS2521 数据表(PDF) 5 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

部件名 TAS2521
功能描述  Digital Input Class-D Speaker Amplifier with Embedded miniDSP and mono headphone amplifier
PDF  35 Pages
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制造商  TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
网页  http://www.taosinc.com
标志 TAOS - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

TAS2521 数据表(HTML) 5 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

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TAS2521
www.ti.com
SLAS687A – FEBRUARY 2013 – REVISED FEBRUARY 2013
3.3
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
AVDD(1)
Referenced to AVSS(2)
1.5
1.8
1.95
Power-supply voltage range
DVDD
Referenced to DVSS(2)
1.65
1.8
1.95
V
SPKVDD(1)
Referenced to SPKVSS(2)
2.7
5.5
IOVDD
Referenced to IOVSS(2)
1.1
1.8
3.6
Speaker impedance
Load applied across class-D output pins (BTL)
4
Headphone impedance
AC-coupled to RL
16
Analog audio full-scale input
VI
AVDD = 1.8 V, single-ended
0.5
VRMS
voltage
Line output load impedance
AC-coupled to RL
10
k
(in half drive ability mode)
MCLK(3)
Master clock frequency
IOVDD = DVDD = 1.8V
50
MHz
SCL
SCL clock frequency
400
kHz
TA
Operating free-air temperature
–40
85
°C
(1)
To minimize battery-current leakage, the SPKVDD voltage level should not be below the AVDD voltage level.
(2)
All grounds on board are tied together, so they should not differ in voltage by more than 0.2 V maximum for any combination of ground
signals. By use of a wide trace or ground plane, ensure a low-impedance connection between AVSS and DVSS.
(3)
The maximum input frequency should be 50 MHz for any digital pin used as a general-purpose clock.
3.4
Electrical Characteristics
At 25°C, AVDD = 1.8V, IOVDD = 1.8 V, SPKVDD = 3.6 V, DVDD = 1.8 V, fS (audio) = 48 kHz, CODEC_CLKIN = 256 × fS,
PLL = Off
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INTERNAL OSCILLATOR—RC_CLK
Oscillator frequency
8.48
MHz
Audio DAC – Stereo Single-Ended Headphone Output
Load = 16
Ω (single-ended), Input & Output CM =
0.9V, DOSR = 128, Device Setup MCLK = 256* fs,
Device Setup
Channel Gain = 0dB word length = 16 bits;
Processing Block = PRB_P1 Power Tune =
PTM_P3
Full-scale output voltage (0 dB)
0.5
Vrms
ICN
Idle channel noise
Measured as idle-channel noise, A-weighted(1) (2)
20.7
μVms
THD+N
Total harmonic distortion + noise
0-dBFS input, 1-kHz input signal
-78.2
dB
Mute attenuation
Mute
103.7
dB
PSRR
Power-supply rejection ratio(3)
Ripple on AVDD (1.8 V) = 200 mVPP at 1 kHz
47.2
dB
DR
Dynamic range, A-weighted(1) (2)
–60dB 1kHz input full-scale signal
88.1
Gain error
0dB, 1kHz input full scale signal
±0.3
dB
RL = 32 Ω, THD+N ≤ –40 dB
11
PO
Maximum output power
mW
RL = 16 Ω, THD+N ≤ –40 dB
18
(1)
Ratio of output level with 1-kHz full-scale sine-wave input, to the output level with the inputs short-circuited, measured A-weighted over a
20-Hz to 20-kHz bandwidth using an audio analyzer.
(2)
All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter may
result in higher THD+N and lower SNR and dynamic range readings than shown in the Electrical Characteristics. The low-pass filter
removes out-of-band noise, which, although not audible, may affect dynamic specification values.
(3)
DAC to headphone-out PSRR measurement is calculated as PSRR = 20 X log(
∆VHP / ∆VAVDD).
Copyright © 2013, Texas Instruments Incorporated
ELECTRICAL SPECIFICATIONS
5
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