INTEDG datasheet(166/478 Pages) MICROCHIP

166 / 478 page

PIC16(L)F1946/47

DS41414D-page 166

 2010-2012 Microchip Technology Inc.

16.2

ADC Operation

16.2.1

STARTING A CONVERSION

To enable the ADC module, the ADON bit of the

ADCON0 register must be set to a ‘1’. Setting the GO/

DONE bit of the ADCON0 register to a ‘1’ will start the

Analog-to-Digital conversion.

16.2.2

COMPLETION OF A CONVERSION

When the conversion is complete, the ADC module will:

• Clear the GO/DONE bit

• Set the ADIF Interrupt Flag bit

• Update the ADRESH and ADRESL registers with

new conversion result

16.2.3

TERMINATING A CONVERSION

If a conversion must be terminated before completion,

the GO/DONE bit can be cleared in software. The

ADRESH and ADRESL registers will be updated with

the partially complete Analog-to-Digital conversion

sample. Incomplete bits will match the last bit

converted.

16.3

ADC Operation During Sleep

The ADC module can operate during Sleep. This

requires the ADC clock source to be set to the FRC

option. When the FRC clock source is selected, the

ADC waits one additional instruction before starting the

conversion. This allows the SLEEP instruction to be

executed, which can reduce system noise during the

conversion. If the ADC interrupt is enabled, the device

will wake-up from Sleep when the conversion

completes. If the ADC interrupt is disabled, the ADC

module is turned off after the conversion completes,

although the ADON bit remains set.

When the ADC clock source is something other than

FRC, a SLEEP instruction causes the present conver-

sion to be aborted and the ADC module is turned off,

although the ADON bit remains set.

16.3.1

SPECIAL EVENT TRIGGER

The Special Event Trigger of the CCPx/ECCPX module

allows periodic ADC measurements without software

intervention. When this trigger occurs, the GO/DONE

bit is set by hardware and the Timer1 counter resets to

zero.

Using the Special Event Trigger does not assure proper

ADC timing. It is the user’s responsibility to ensure that

the ADC timing requirements are met.

Refer to Section 23.0 “Capture/Compare/PWM

Modules”

for more information.

Note:

The GO/DONE bit should not be set in the

same instruction that turns on the ADC.

Refer to Section 16.3.2 “A/D Conver-

sion Procedure”

Note:

A device Reset forces all registers to their

Reset state. Thus, the ADC module is

turned off and any pending conversion is

terminated.

TABLE 16-2:

SPECIAL EVENT TRIGGER

Device

CCPx/ECCPx

PIC16(L)F1946/47

CCP5

INTEDG 数据表(PDF) 166 Page - Microchip Technology

INTEDG 数据表(HTML) 166 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载