ADE7753ARS datasheet(17/60 Pages) AD

17 / 60 page

ADE7753

Rev. C | Page 17 of 60

DC COMPONENT (INCLUDING ERROR TERM)

IS EXTRACTED BY THE LPF FOR REAL

POWER CALCULATION

FREQUENCY (RAD/S)

IOS × V

VOS × I

VOS × IOS

× I

02875-0-033

Figure 33. Effect of Channel Offsets on the Real Power Calculation

The contents of the offset correction registers are 6-bit, sign and

magnitude coded. The weight of the LSB depends on the gain

setting, i.e., 1, 2, 4, 8, or 16. Table 6 shows the correctable offset

span for each of the gain settings and the LSB weight (mV) for

the offset correction registers. The maximum value that can be

written to the offset correction registers is ±31d—see Figure 34.

Figure 34 shows the relationship between the offset correction

gain setting of 1. In order to perform an offset adjustment, the

analog inputs should be first connected to AGND, and there

should be no signal on either Channel 1 or Channel 2. A read

from Channel 1 or Channel 2 using the waveform register

indicates the offset in the channel. This offset can be canceled

by writing an equal and opposite offset value to the Channel 1

offset register, or an equal value to the Channel 2 offset register.

The offset correction can be confirmed by performing another

read. Note when adjusting the offset of Channel 1, one should

disable the digital integrator and the HPF.

Table 6. Offset Correction Range—Channels 1 and 2

Gain

Correctable Span

LSB Size

±50 mV

1.61 mV/LSB

±37 mV

1.19 mV/LSB

±30 mV

0.97 mV/LSB

±26 mV

0.84 mV/LSB

±24 mV

0.77 mV/LSB

CH1OS[5:0]

SIGN + 5 BITS

+50mV

OFFSET

ADJUST

0x3F

0x00

0x1F

–50mV

0mV

SIGN + 5 BITS

01,1111b

11,1111b

02875-0-034

Figure 34. Channel 1 Offset Correction Range (Gain = 1)

The current and voltage rms offsets can be adjusted with the

IRMSOS and VRMSOS registers—see Channel 1 RMS Offset

Compensation and Channel 2 RMS Offset Compensation

sections.

di/dt CURRENT SENSOR AND DIGITAL INTEGRATOR

A di/dt sensor detects changes in magnetic field caused by ac

current. Figure 35 shows the principle of a di/dt current sensor.

MAGNETIC FIELD CREATED BY CURRENT

(DIRECTLY PROPORTIONAL TO CURRENT)

+ EMF (ELECTROMOTIVE FORCE)

– INDUCED BY CHANGES IN

MAGNETIC FLUX DENSITY (di/dt)

02875-0-035

Figure 35. Principle of a di/dt Current Sensor

The flux density of a magnetic field induced by a current is

directly proportional to the magnitude of the current. The

changes in the magnetic flux density passing through a

conductor loop generate an electromotive force (EMF) between

the two ends of the loop. The EMF is a voltage signal, which is

proportional to the di/dt of the current. The voltage output

from the di/dt current sensor is determined by the mutual

inductance between the current-carrying conductor and the

di/dt sensor. The current signal needs to be recovered from the

di/dt signal before it can be used. An integrator is therefore

necessary to restore the signal to its original form. The ADE7753

has a built-in digital integrator to recover the current signal

from the di/dt sensor. The digital integrator on Channel 1 is

switched off by default when the ADE7753 is powered up.

Setting the MSB of CH1OS register turns on the integrator.

Figure 36 to Figure 39 show the magnitude and phase response

of the digital integrator.

FREQUENCY (Hz)

–10

–20

–30

–40

–50

102

103

02875-0-036

Figure 36. Combined Gain Response of the

Digital Integrator and Phase Compensator

ADE7753ARS 数据表(PDF) 17 Page - Analog Devices

ADE7753ARS 数据表(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

数据表下载