ADE7753ARSZ datasheet(35/60 Pages) AD

35 / 60 page

ADE7753

Rev. C | Page 35 of 60

The features of the line reactive energy accumulation are the

same as the line active energy accumulation. The number of

half line cycles is specified in the LINECYC register. LINECYC

is an unsigned 16-bit register. The ADE7753 can accumulate

reactive power for up to 65535 combined half cycles. At the end

of an energy calibration cycle, the CYCEND flag in the interrupt

status register is set. If the CYCEND mask bit in the interrupt

mask register is enabled, the IRQ output also goes active low.

Thus the IRQ line can also be used to signal the end of a cali-

bration. The ADE7753 accumulates the reactive power signal in

the LVARENERGY register for an integer number of half cycles,

as shown in

Figure 71

SIGN OF REACTIVE POWER CALCULATION

Note that the average reactive power is a signed calculation. The

phase shift filter has –90° phase shift when the integrator is

enabled, and +90° phase shift when the integrator is disabled.

Table 9 summarizes the relationship between the phase differ-

ence between the voltage and the current and the sign of the

resulting VAR calculation.

Table 9. Sign of Reactive Power Calculation

Angle

Integrator

Sign

Between 0° to 90°

Off

Positive

Between –90° to 0°

Off

Negative

Between 0° to 90°

Positive

Between –90° to 0°

Negative

APPARENT POWER CALCULATION

The apparent power is defined as the maximum power that can

be delivered to a load. Vrms and Irms are the effective voltage and

current delivered to the load; the apparent power (AP) is defined

as Vrms × Irms. The angle θ between the active power and the

apparent power generally represents the phase shift due to non-

resistive loads. For single-phase applications, θ represents the

angle between the voltage and the current signals—see Figure 72.

REACTIVE

POWER

APPARENT

POWER

ACTIVE

POWER

02875-0-071

Figure 72. Power Triangle

The apparent power is defined as Vrms × Irms. This expression is

independent from the phase angle between the current and the

voltage.

Figure 73 illustrates the signal processing in each phase for the

calculation of the apparent power in the ADE7753.

Vrms

Irms

0xAD055

APPARENT POWER

SIGNAL (P)

CURRENT RMS SIGNAL – i(t)

VOLTAGE RMS SIGNAL– v(t)

MULTIPLIER

02875-0-072

0x00

0x1C82B3

0x00

0x17D338

VAGAIN

Figure 73. Apparent Power Signal Processing

The gain of the apparent energy can be adjusted by using the

multiplier and VAGAIN register (VAGAIN[11:0]). The gain is

adjusted by writing a twos complement, 12-bit word to the

VAGAIN register. Equation 29 shows how the gain adjustment

is related to the contents of the VAGAIN register.

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

⎭

⎬

⎫

⎩

⎨

⎧ +

VAGAIN

Power

Apparent

OutputVAGA

(29)

For example, when 0x7FF is written to the VAGAIN register,

the power output is scaled up by 50%. 0x7FF = 2047d, 2047/212

= 0.5. Similarly, 0x800 = –2047d (signed twos complement) and

power output is scaled by –50%. Each LSB represents 0.0244%

of the power output. The apparent power is calculated with the

current and voltage rms values obtained in the rms blocks of the

ADE7753. Figure 74 shows the maximum code (hexadecimal)

output range of the apparent power signal. Note that the output

range changes depending on the contents of the apparent power

gain registers. The minimum output range is given when the

apparent power gain register content is equal to 0x800 and the

maximum range is given by writing 0x7FF to the apparent

power gain register. This can be used to calibrate the apparent

power (or energy) calculation in the ADE7753.

0x103880

0xAD055

0x5682B

0x00000

0x000

0x7FF

0x800

{VAGAIN[11:0]}

APPARENT POWER 100% FS

APPARENT POWER 150% FS

APPARENT POWER 50% FS

APPARENT POWER

CALIBRATION RANGE

VOLTAGE AND CURRENT

CHANNEL INPUTS: 0.5V/GAIN

02875-0-073

Figure 74. Apparent Power Calculation Output Range

Apparent Power Offset Calibration

Each rms measurement includes an offset compensation

value—see Channel 1 RMS Calculation and Channel 2 RMS

Calculation sections. The Channel 1 and Channel 2 rms values

are then multiplied together in the apparent power signal

processing. Since no additional offsets are created in the

multiplication of the rms values, there is no specific offset

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