ADE7753ARSZ datasheet(48/60 Pages) AD

48 / 60 page

ADE7753

Rev. C | Page 48 of 60

The impulse/LSB ratio used to convert the value in the

LVARENERGY register into a pulse output can be expressed in

terms of impulses/VARh and VARh/LSB.

imp/LSB =

nominal

expected

VARCF

LSB

VARh

imp

)

(

(73)

VARCFIB(expected) =

)

sin(

s/h

3600

)

(

nominal

VARh

imp

VARConstan

(74)

VARCFIB(nominal) =

PERIOD

time

Accumulati

PERIOD

LVARENERGY

(s)

(75)

where the accumulation time is calculated from Equation 37.

The line period can be determined from the PERIOD register

according to Equation 38. Then VAR can be determined from

the LVARENERGY register value:

VARh =

PERIOD

LSB

VARh

LVARENERGY

(76)

VAR =

PERIOD

time

Accumulati

PERIOD

LSB

VARh

LVARENERGY

(s)

s/h

3600

(77)

The PERIOD50 Hz/PERIOD factor in the preceding VAR equations

is the correction factor for the 1/f frequency attenuation of the

low-pass filter. The PERIOD50 Hz term refers to the line period at

calibration and could represent a frequency other than 50 Hz.

CLKIN FREQUENCY

In this data sheet, the characteristics of the ADE7753 are shown

when CLKIN frequency is equal to 3.579545 MHz. However, the

ADE7753 is designed to have the same accuracy at any CLKIN

frequency within the specified range. If the CLKIN frequency is

not 3.579545 MHz, various timing and filter characteristics need

to be redefined with the new CLKIN frequency. For example,

the cutoff frequencies of all digital filters such as LPF1, LPF2, or

HPF1, shift in proportion to the change in CLKIN frequency

according to the following equation:

MHz

Frequency

CLKIN

Frequency

Original

Frequency

New

579545

(78)

The change of CLKIN frequency does not affect the timing

characteristics of the serial interface because the data transfer is

synchronized with serial clock signal (SCLK). But one needs to

observe the read/write timing of the serial data transfer—see

the ADE7753 timing characteristics in Table 2. Table 11 lists

various timing changes that are affected by CLKIN frequency.

Table 11. Frequency Dependencies of the ADE7753

Parameters

Parameter

CLKIN Dependency

Nyquist Frequency for CH 1 and CH 2 ADCs

CLKIN/8

PHCAL Resolution (Seconds per LSB)

4/CLKIN

Active Energy Register Update Rate (Hz)

CLKIN/4

Waveform Sampling Rate (per Second)

WAVSEL 1,0 =

0 0

CLKIN/128

0 1

CLKIN/256

1 0

CLKIN/512

1 1

CLKIN/1024

Maximum ZXTOUT Period

524,288/CLKIN

SUSPENDING ADE7753 FUNCTIONALITY

The analog and the digital circuit can be suspended separately.

The analog portion of the ADE7753 can be suspended by setting

the ASUSPEND bit (Bit 4) of the mode register to logic high—

see the Mode Register (0x9) section. In suspend mode, all wave-

form samples from the ADCs are set to 0. The digital circuitry

can be halted by stopping the CLKIN input and maintaining a

logic high or low on the CLKIN pin. The ADE7753 can be

reactivated by restoring the CLKIN input and setting the

ASUSPEND bit to logic low.

CHECKSUM REGISTER

The ADE7753 has a checksum register (CHECKSUM[5:0]) to

ensure the data bits received in the last serial read operation are

not corrupted. The 6-bit checksum register is reset before the

first bit (MSB of the register to be read) is put on the DOUT

pin. During a serial read operation, when each data bit becomes

available on the rising edge of SCLK, the bit is added to the

checksum register. In the end of the serial read operation, the

content of the checksum register is equal to the sum of all ones

in the register previously read. Using the checksum register, the

user can determine if an error has occurred during the last read

operation. Note that a read to the checksum register also

generates a checksum of the checksum register itself.

CONTENT OF REGISTER (n-bytes)

CHECKSUM REGISTER

ADDR: 0x3E

DOUT

02875-0-077

Figure 88. Checksum Register for Serial Interface Read

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