ADE7753ARSZ datasheet(51/60 Pages) AD

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ADE7753

Rev. C | Page 51 of 60

ADE7753 Serial Read Operation

During a data read operation from the ADE7753, data is shifted

out at the DOUT logic output on the rising edge of SCLK. As is

the case with the data write operation, a data read must be

preceded with a write to the communications register.

With the ADE7753 in communications mode (i.e., CS logic

low), an 8-bit write to the communications register first takes

place. The MSB of this byte transfer is a 0, indicating that the

next data transfer operation is a read. The LSBs of this byte

contain the address of the register that is to be read. The

ADE7753 starts shifting out of the register data on the next

rising edge of SCLK—see

. At this point, the DOUT

logic output leaves its high impedance state and starts driving

the data bus. All remaining bits of register data are shifted out

on subsequent SCLK rising edges. The serial interface also

enters communications mode again as soon as the read has

been completed. At this point, the DOUT logic output enters a

high impedance state on the falling edge of the last SCLK pulse.

The read operation can be aborted by bringing the

Figure 94

CS logic

input high before the data transfer is complete. The DOUT

output enters a high impedance state on the rising edge of CS.

When an ADE7753 register is addressed for a read operation,

the entire contents of that register are transferred to the serial

port. This allows the ADE7753 to modify its on-chip registers

without the risk of corrupting data during a multibyte transfer.

Note that when a read operation follows a write operation, the

read command (i.e., write to communications register) should

not happen for at least 4 μs after the end of the write operation.

If the read command is sent within 4 μs of the write operation,

the last byte of the write operation could be lost. This timing

constraint is given as timing specification t9.

SCLK

t10

t13

DB0

DB7

DB0

DB7

DIN

DOUT

t11

t12

COMMAND BYTE

MOST SIGNIFICANT BYTE

LEAST SIGNIFICANT BYTE

02875-0-083

Figure 94. Serial Interface Read Timing

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