AR1010T-ISLASHML datasheet(17/70 Pages) MICROCHIP

17 / 70 page

 2009-2012 Microchip Technology Inc.

Preliminary

DS41393B-page 17

AR1000 SERIES RESISTIVE TOUCH SCREEN CONTROLLER

4.0

I2CTM COMMUNICATIONS

The AR1021 is an I2C slave device with a 7-bit address

of 0x4D, supporting up to 400 kHz bit rate.

A master (host) device interfaces with the AR1021.

4.1

I2C Hardware Interface

A summary of the hardware interface pins is shown

below in Table 4-1.

M1 Pin

• The M1 pin must be connected to VSS to config-

ure the AR1021 for I2C communications.

SCL Pin

• The SCL (Serial Clock) pin is electrically

open-drain and requires a pull-up resistor, typi-

cally 2.2 K

 to 10 K, from SCL to VDD.

• SCL Idle state is high.

SDA Pin

• The SDA (Serial Data) pin is electrically

open-drain and requires a pull-up resistor, typi-

cally 2.2K

 to 10K, from SDA to VDD.

• SDA Idle state is high.

• Master write data is latched in on SCL rising

edges.

• Master read data is latched out on SCL falling

edges to ensure it is valid during the subsequent

SCL high time.

SDO Pin

• The SDO pin is a driven output interrupt to the

master.

• SDO Idle state is low.

• SDO will be asserted high when the AR1021 has

data ready (touch report or command response)

for the master to read.

TABLE 4-1:

I2C HARDWARE INTERFACE

AR1021 Pin

Description

Connect to VSS to select I2C™ communications

SCL

Serial Clock to master I2C

SDA

Serial Data to master I2C

SDO

Data ready interrupt output to master

AR1010T-I/ML 数据表(PDF) 17 Page - Microchip Technology

AR1010T-I/ML 数据表(HTML) 17 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

数据表下载