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OMAP3530ECBC 数据表(PDF) 220 Page - Texas Instruments |
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OMAP3530ECBC 数据表(HTML) 220 Page - Texas Instruments |
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220 / 264 page  mmx_txen_n mmx_txdat mmx_txse0 mmx_rxrcv FSUT13 FSUT11 FSUT12 FSUT9 FSUT9 FSUT10 FSUT10 FSUT14 FSUT15 FSUT16 Receive Transmit 030-084 6.6.3.6 Multiport Full-Speed Universal Serial Bus (USB) – Bidirectional TLL 3-pin Mode OMAP3530/25 Applications Processor SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 www.ti.com Table 6-90. Low-/Full-Speed USB Timing Requirements – Bidirectional TLL 4-pin Mode NO. PARAMETER 1.15 V 1.0 V UNIT MIN MAX MIN MAX FSUT9 td(DAT,SE0) Time duration, mmx_txdat and mmx_txse0 low 14 14 ns together during transition FSUT10 td(DAT,SE0) Time duration, mmx_tsdat and mmx_txse0 high 8 8 ns together during transition Table 6-91. Low-/Full-Speed USB Switching Characteristics – Bidirectional TLL 4-pin Mode NO. PARAMETER 1.15 V 1.0 V UNIT MIN MAX MIN MAX FSUT11 td(TXENL-DATV) Delay time, mmx_txen_n active to mmx_txdat valid 81.8 84.8 81.8 84.8 ns FSUT12 td(TXENL-SE0V) Delay time, mmx_txen_n active to mmx_txse0 valid 81.8 84.8 81.8 84.8 ns FSUT13 ts(DAT-SE0) Skew between mmx_txdat and mmx_txse0 1.5 1.5 ns transition FSUT14 ts(DP,DM-RCV) Skew between mmx_rxdp, mmx_rxdm, and 1.5 1.5 ns mmx_rxrcv transition FSUT15 td(DATI-TXENL) Delay time, mmx_txse0 invalid to mmx_txen_n Low 81.8 81.8 ns FSUT16 td(SE0I-TXENL) Delay time, mmx_txdat invalid to mmx_txen_n Low 81.8 81.8 ns tR(rcv) Rise time, mmx_rxrcv 4 4 ns tF(rcv) Fall time, mmx_rxrcv 4 4 ns tR(dat) Rise time, mmx_txdat 4 4 ns tF(dat) Fall time, mmx_txdat 4 4 ns tR(se0) Rise time, mmx_txse0 4 4 ns tF(se0) Fall time, mmx_txse0 4 4 ns In mmx, x is equal to 0, 1, or 2. Figure 6-47. Low-/Full-Speed USB – Bidirectional TLL 4-pin Mode Table 6-93 and Table 6-94 assume testing over the recommended operating conditions (see Figure 6-48). Table 6-92. Low-/Full-Speed USB Timing Conditions – Bidirectional TLL 3-pin Mode TIMING CONDITION PARAMETER VALUE UNIT Input Conditions tR Input signal rise time 2 ns tF Input signal fall time 2 ns TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 220 Submit Documentation Feedback |
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