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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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OMAP3530ECBC 数据表(PDF) 252 Page - Texas Instruments |
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OMAP3530ECBC 数据表(HTML) 252 Page - Texas Instruments |
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252 / 264 page  jtag_tck jtag_rtck jtag_tdi jtag_tms jtag_emux(IN) jtag_tdo jtag_emux(OUT) JT7 JT11 JT1 JT2 JT3 JT8 JT10 JT9 JT4 JT5 JT6 JT12 JT13 JT14 030-113 6.8.3.2 JTAG – Adaptive Clock Mode OMAP3530/25 Applications Processor SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 www.ti.com Table 6-149. JTAG Switching Characteristics – Free Running Clock Mode NO. PARAMETER 1.15 V 1.0 V UNIT MIN MAX MIN MAX JT1 tc(rtck) Cycle time(1), jtag_rtck period 25 33 ns JT2 tw(rtckL) Typical pulse duration, jtag_rtck low 0.5*PO(2) 0.5*PO(2) ns JT3 tw(rtckH) Typical pulse duration, jtag_rtck high 0.5*PO(2) 0.5*PO(2) ns tdc(rtck) Duty cycle error, jtag_rtck –1250 1250 –1667 1667 ps tj(rtck) Jitter standard deviation(3), jtag_rtck 33.3 33.3 ps tR(rtck) Rise time, jtag_rtck 4 4 ns tF(rtck) Fall time, jtag_rtck 4 4 ns JT11 td(rtckL-tdoV) Delay time, jtag_rtck low to jtag_tdo valid –5.8 5.8 –7.9 7.9 ns tR(tdo) Rise time, jtag_tdo 4 4 ns tF(tdo) Fall time, jtag_tdo 4 4 ns JT14 td(rtckH-emuxV) Delay time, jtag_rtck high to ,jtag_emux(4) valid 2.7 15.1 2.7 20.4 ns tR(emux) Rise time, jtag_emux(4) 6 6 ns tF(emux) Fall time, jtag_emux(4) 6 6 ns (1) Related with the jtag_rtck maximum frequency. (2) PO = jtag _rtck period in ns. (3) The jitter probability density can be approximated by a Gaussian function. (4) x = 0 to 1 In jtag_emux, x is equal to 0 to 1. Figure 6-72. JTAG Interface Timing – Free Running Clock Mode Table 6-151 and Table 6-152 assume testing over the recommended operating conditions and electrical characteristic conditions (see Figure 6-73): TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 252 Submit Documentation Feedback |
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