STM8S003F3U6CTR datasheet(42/100 Pages) STMICROELECTRONICS

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Description

Option byte no.

Note: Refer to the family reference manual (RM0016) section on

Flash/EEPROM memory readout protection for details.

UBC[7:0] User boot code area

OPT1

0x00: no UBC, no write-protection

0x01: Page 0 defined as UBC, memory write-protected

0x02: Pages 0 to 1 defined as UBC, memory write-protected.

Page 0 and 1 contain the interrupt vectors.

...

0x7F: Pages 0 to 126 defined as UBC, memory write-protected

Other values: Pages 0 to 127 defined as UBC, memory

write-protected

Note: Refer to the family reference manual (RM0016) section on

Flash write protection for more details.

AFR[7:0]

OPT2

Refer to following section for alternate function remapping decriptions

of bits [7:2] and [1:0] respectively.

HSITRIM:High speed internal clock trimming register size

OPT3

0: 3-bit trimming supported in CLK_HSITRIMR register

1: 4-bit trimming supported in CLK_HSITRIMR register

LSI_EN:Low speed internal clock enable

0: LSI clock is not available as CPU clock source

1: LSI clock is available as CPU clock source

IWDG_HW: Independent watchdog

0: IWDG Independent watchdog activated by software

1: IWDG Independent watchdog activated by hardware

WWDG_HW: Window watchdog activation

0: WWDG window watchdog activated by software

1: WWDG window watchdog activated by hardware

WWDG_HALT: Window watchdog reset on halt

DocID018576 Rev 3

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STM8S003K3 STM8S003F3

Option bytes

STM8S003F3U6CTR 数据表(PDF) 42 Page - STMicroelectronics

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