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MPC8315CVRADDA 数据表(PDF) 74 Page - Freescale Semiconductor, Inc |
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MPC8315CVRADDA 数据表(HTML) 74 Page - Freescale Semiconductor, Inc |
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74 / 106 page ![]() MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 74 Freescale Semiconductor TDM This figure shows the SPI timing in slave mode (external clock). Figure 57. SPI AC Timing in Slave Mode (External Clock) Diagram This figure shows the SPI timing in master mode (internal clock). Figure 58. SPI AC Timing in Master Mode (Internal Clock) Diagram 22 TDM This section describes the DC and AC electrical specifications for the TDM of the MPC8315E. 22.1 TDM DC Electrical Characteristics This table provides the DC electrical characteristics TDM. Table 68. TDM DC Electrical Characteristics Characteristic Symbol Condition Min Max Unit Output high voltage VOH IOH = –8.0 mA 2.4 — V Output low voltage VOL IOL = 8.0 mA — 0.5 V Output low voltage VOL IOL = 3.2 mA — 0.4 V Input high voltage VIH — 2.1 NVDD + 0.3 V Input low voltage VIL —–0.3 0.8 V Input current IIN 0 V V IN NVDD — ± 5 A SPICLK (Input) tNEIXKH tNEIVKH tNEKHOV Input Signals: SPIMOSI (See Note) Output Signals: SPIMISO (See Note) Note: The clock edge is selectable on SPI. SPICLK (Output) tNIIXKH tNIKHOV Input Signals: SPIMISO (See Note) Output Signals: SPIMOSI (See Note) Note: The clock edge is selectable on SPI. tNIIVKH |
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