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MPC8315CVRADDA 数据表(PDF) 85 Page - Freescale Semiconductor, Inc |
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MPC8315CVRADDA 数据表(HTML) 85 Page - Freescale Semiconductor, Inc |
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85 / 106 page  MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 85 Package and Pin Listings PCI_REQ0 E18 I/O NVDD2_OFF — PCI_REQ1/CPCI_HS_ES C18 I NVDD2_OFF — PCI_REQ2 E17 I NVDD2_OFF — PCI_GNT0 B20 I/O NVDD2_OFF — PCI_GNT1/CPCI_HS_LED D17 O NVDD2_OFF — PCI_GNT2/CPCI_HS_ENUM E15 O NVDD2_OFF — M66EN L24 I NVDD2_OFF — PCI_CLK0 E23 O NVDD2_OFF — PCI_CLK1 F24 O NVDD2_OFF — PCI_CLK2 E25 O NVDD2_OFF — PCI_PME B23 I/O NVDD2_OFF 2 ETSEC1/_USBULPI GPIO_24/TSEC1_COL/USBDR_TXDRXD0 J1 I/O LVDD1_OFF — GPIO_25/TSEC1_CRS/USBDR_TXDRXD1 H1 I/O LVDD1_OFF — TSEC1_GTX_CLK/USBDR_TXDRXD2 K5 I/O LVDD1_OFF 3 TSEC1_RX_CLK/USBDR_TXDRXD3 J4 I/O LVDD1_OFF — TSCE1_RX_DV/USBDR_TXDRXD4 J2 I/O LVDD1_OFF — TSEC1_RXD[3]/USBDR_TXDRXD5 G1 I/O LVDD1_OFF — TSEC1_RXD[2]/USBDR_TXDRXD6 H3 I/O LVDD1_OFF — TSEC1_RXD[1]/USBDR_TXDRXD7/TSEC _TMR_CLK J5 I/O LVDD1_OFF — TSEC1_RXD[0]/USBDR_NXT/TSEC_TMR _TRIG1 H2 I LVDD1_OFF — TSEC1_RX_ER/USBDR_DIR/TSEC_TMR_ TRIG2 H5 I LVDD1_OFF — TSEC1_TX_CLK/USBDR_CLK G2 I LVDD1_OFF — GPIO_28/TSEC1_TXD[3]/TSEC_TMR_GC LK F3 I/O LVDD1_OFF — GPIO_29/TSEC1_TXD[2]/TSEC_TMR_PP1 F2 I/O LVDD1_OFF — GPIO_30/TSEC1_TXD[1]/TSEC_TMR_PP2 F1 I/O LVDD1_OFF — TSEC1_TXD[0]/USBDR_STP/ TSEC_TMR_PP3 G4 O LVDD1_OFF 12 GPIO_31/TSEC1_TX_EN/TSEC_TMR_AL ARM1 F4 I/O LVDD1_OFF — TSEC1_TX_ER/TSEC_TMR_ALARM2 G5 O LVDD1_OFF — TSEC_GTX_CLK125 D1 I NVDD1_ON — TSEC_MDC/LB_POR_CFG_BOOT_ECC E3 I/O NVDD1_ON 9 TSEC_MDIO E2 I/O NVDD1_ON Table 70. MPC8315E TEPBGA II Pinout Listing (continued) Signal Package Pin Number Pin Type Power Supply Note |
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