ADuCM361BCPZ128-R7 datasheet(7/24 Pages) AD

7 / 24 page

Data Sheet

ADuCM360/ADuCM361

Rev. B | Page 7 of 24

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Average Input Current Drift1

Buffered Mode

AIN0, AIN1, AIN2, AIN3

±5

pA/°C

AIN4, AIN5, AIN6, AIN7

±16

pA/°C

AIN8, AIN9, AIN10, AIN11

±9

pA/°C

Unbuffered Mode

±250

pA/V/°C

Common-Mode Rejection, DC1

On ADC input

ADC gain = 1, AVDD < 2 V

100

ADC gain = 1, AVDD > 2 V

100

ADC gain = 2 to 128

Common-Mode Rejection,

50 Hz/60 Hz1

50 Hz/60 Hz ± 1 Hz; fADC = 16.7 Hz,

chop on; fADC = 50 Hz, chop off

ADC gain = 1

ADC gain = 2 to 128

Normal-Mode Rejection, 50 Hz/60 Hz1

On ADC input

50 Hz/60 Hz ± 1 Hz; fADC = 16.7 Hz,

chop on; fADC = 50 Hz, chop off

TEMPERATURE SENSOR1

After user calibration

Voltage Output at 25°C

Processor powered down or in standby

mode before measurement

82.1

Voltage Temperature Coefficient (TC)

250

µV/°C

Accuracy

°C

GROUND SWITCH

RON

3.7

Ω

Allowable Current1

20 kΩ resistor off, direct short to ground

VOLTAGE REFERENCE

ADC internal reference

Internal VREF

1.2

Initial Accuracy

Measured at TA = 25°C

−0.1

+0.1

Reference Temperature Coefficient

(TC)1, 10

−15

±5

+15

ppm/°C

Power Supply Rejection1

EXTERNAL REFERENCE INPUTS

Input Range

Buffered Mode

AGND + 0.1

AVDD − 0.1

Unbuffered Mode

Minimum differential voltage between

VREF+ and VREF− pins is 400 mV

AVDD

Input Current

Buffered Mode

−20

+10

+27

Unbuffered Mode

500

nA/V

Normal-Mode Rejection1

Common-Mode Rejection1

100

Reference Detect Levels1

400

EXCITATION CURRENT SOURCES

Output Current

Available from each current source; value

programmable from 10 µA to 1 mA

1000

μA

Initial Tolerance at 25°C1

IOUT ≥ 50 µA

±5

Drift1

Using internal reference resistor

100

400

ppm/°C

Using external 150 kΩ reference resistor

between IREF pin and AGND; resistor

must have drift specification of 5 ppm/°C

400

ppm/°C

Initial Current Matching at 25°C1

Matching between both current sources

±0.5

Drift Matching1

ppm/°C

Load Regulation, AVDD1

AVDD = 3.3 V

0.2

%/V

Output Compliance1

IOUT = 10 µA to 210 µA

AGND − 0.03

AVDD − 0.85

IOUT > 210 µA

AGND − 0.03

AVDD − 1.1

ADuCM361BCPZ128-R7 数据表(PDF) 7 Page - Analog Devices

ADuCM361BCPZ128-R7 数据表(HTML) 7 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表下载

链接网址

ADuCM361BCPZ128-R7 数据表(PDF) 7 Page - Analog Devices

ADuCM361BCPZ128-R7 数据表(HTML) 7 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表 下载

链接网址

数据表下载