REV. B

–14–

AD8351

EVALUATION BOARD

An evaluation board is available for experimentation. Various

parameters such as gain, common-mode level, and input and

output network configurations can be modified through minor

resistor changes. The schematic and evaluation board artwork

are presented in Figures 15, 16, and 17.

Figure 16. Component Side Layout

Figure 17. Component Side Silkscreen

2

1

3

4

5

9

10

8

7

6

PWUP

VOCM

RGP1

VPOS

INHI

OPHI

INLO

OPLO

RGP2

COMM

AD8351

10 PIN mSOIC

R2

24.9

R1

100

R7

0

R5

0

R8

0

R4

24.9

R3

OPEN

R12

0

J1

RF_IN+

J2

RF_IN–

R15

0

R16

0

C6

100nF

C7

100nF

R10

61.9

T2

1:1

ETC1-1-13

(MACOM)

R14

0

R13

OPEN

R11

61.9

R9

61.9

J3

RF_OUT+

J4

RF_OUT–

C3

0.1 F

R6

OPEN

R17

0

C2

100nF

AGND

VPOS

P1

R18

0

W1

C4

100nF

C5

100nF

T1

1:1

ETC1-1-13

(MACOM)

C10

100nF

C9

100nF

T3

1:1

ETC1-1-13

(MACOM)

J5

TEST IN2

T4

1:1

ETC1-1-13

(MACOM)

J6

TEST OUT2

Figure 15. Evaluation Board Schematic