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STM32F100C 数据表(PDF) 59 Page - STMicroelectronics

部件名 STM32F100C
功能描述  High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces
PDF  98 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F100C 数据表(HTML) 59 Page - STMicroelectronics

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STM32F100xC, STM32F100xD, STM32F100xE
Electrical characteristics
Doc ID 15081 Rev 7
59/98
Figure 18.
Asynchronous multiplexed PSRAM/NOR write waveforms
Table 33.
Asynchronous multiplexed PSRAM/NOR write timings(1)(2)
1.
CL = 15 pF.
2.
Preliminary values.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FSMC_NE low time
5THCLK – 1
5THCLK + 2
ns
tv(NWE_NE)
FSMC_NEx low to FSMC_NWE low
2THCLK
2THCLK + 1
ns
tw(NWE)
FSMC_NWE low time
2THCLK – 1
2THCLK + 2
ns
th(NE_NWE)
FSMC_NWE high to FSMC_NE high hold time
THCLK – 1
ns
tv(A_NE)
FSMC_NEx low to FSMC_A valid
7
ns
tv(NADV_NE)
FSMC_NEx low to FSMC_NADV low
3
5
ns
tw(NADV)
FSMC_NADV low time
THCLK – 1
THCLK + 1
ns
th(AD_NADV)
FSMC_AD (address) valid hold time after
FSMC_NADV high
THCLK – 3
ns
th(A_NWE)
Address hold time after FSMC_NWE high
4THCLK
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
1.6
ns
th(BL_NWE)
FSMC_BL hold time after FSMC_NWE high
THCLK – 1.5
ns
tv(Data_NADV) FSMC_NADV high to Data valid
THCLK + 1.5
ns
th(Data_NWE) Data hold time after FSMC_NWE high
THCLK – 5
ns
NBL
Data
FSMC_NEx
FSMC_NBL[1:0]
FSMC_AD[15:0]
tv(BL_NE)
th(Data_NWE)
FSMC_NOE
Address
FSMC_A[25:16]
tv(A_NE)
tw(NWE)
FSMC_NWE
tv(NWE_NE)
t h(NE_NWE)
th(A_NWE)
th(BL_NWE)
t v(A_NE)
tw(NE)
ai14891B
Address
FSMC_NADV
t v(NADV_NE)
tw(NADV)
t v(Data_NADV)
th(AD_NADV)



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