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STM32F100C 数据表(PDF) 45 Page - STMicroelectronics |
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STM32F100C 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 98 page  STM32F100xC, STM32F100xD, STM32F100xE Electrical characteristics Doc ID 15081 Rev 7 45/98 Table 18. Typical current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Typical values(1) 1. Typical values are measures at TA = 25 °C, VDD = 3.3 V. Unit All peripherals enabled(2) 2. Add an additional power consumption of 0.8 mA for the ADC and of 0.5 mA for the DAC analog part. In applications, this consumption occurs only while the ADC is on (ADON bit is set in the ADC_CR2 register). All peripherals disabled IDD Supply current in Sleep mode Running on high-speed external clock with an 8 MHz crystal(3) 3. An 8 MHz crystal is used as the external clock source. The AHB prescaler is used to reduce the frequency when fHCLK > 8 MHz, the PLL is used when fHCLK > 8 MHz. 24 MHz 8.7 2.75 mA 16 MHz 6.1 2.1 8 MHz 3.3 1.3 4 MHz 2.25 1.2 2 MHz 1.65 1.15 1 MHz 1.35 1.1 500 kHz 1.2 1.07 125 kHz 1.1 1.05 Running on high-speed internal RC (HSI) 24 MHz 8 2.15 16 MHz 5.5 1.5 8 MHz 2.7 0.75 4 MHz 1.65 0.6 2 MHz 1.1 0.55 1 MHz 0.8 0.5 500 kHz 0.65 0.49 125 kHz 0.53 0.47 |
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